2025-04-02 06:00:43 [INFO] transceiver.py:157 Init transceiver 'BTS@172.18.30.20:5700'
2025-04-02 06:00:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.30.20:5802)
2025-04-02 06:00:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.30.20:5801)
2025-04-02 06:00:43 [INFO] transceiver.py:157 Init transceiver 'MS@172.18.30.22:6700'
2025-04-02 06:00:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.30.22:6802)
2025-04-02 06:00:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.30.22:6801)
2025-04-02 06:00:43 [INFO] transceiver.py:157 Init transceiver 'TRX1@172.18.30.20:5700/1'
2025-04-02 06:00:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.30.20:5804)
2025-04-02 06:00:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.30.20:5803)
2025-04-02 06:00:43 [INFO] transceiver.py:157 Init transceiver 'TRX2@172.18.30.20:5700/2'
2025-04-02 06:00:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.30.20:5806)
2025-04-02 06:00:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.30.20:5805)
2025-04-02 06:00:43 [INFO] transceiver.py:157 Init transceiver 'TRX3@172.18.30.20:5700/3'
2025-04-02 06:00:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.30.20:5808)
2025-04-02 06:00:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.30.20:5807)
2025-04-02 06:00:43 [INFO] fake_trx.py:426 Init complete
2025-04-02 06:00:43 [INFO] fake_trx.py:457 Setting real time process scheduler to SCHED_RR, priority 30
2025-04-02 06:00:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:00:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:00:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:00:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:00:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:00:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 0 -> 1
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:00:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:00:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 0 -> 1
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:00:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:00:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 0 -> 1
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:00:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:00:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 0 -> 1
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:00:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:00:47 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:00:47 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:00:47 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:48 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:00:48 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:00:48 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:48 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:49 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:50 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:00:51 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:00:52 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:53 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:54 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:55 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:56 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:57 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:00:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:00:59 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:00 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:00 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:01 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:01 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:01:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:01:06 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:01:06 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:07 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:01:07 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:01:07 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
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2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:07 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=257 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:01:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:01:12 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:01:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:01:13 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:01:13 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:01:13 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:13 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:13 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:01:18 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:01:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:01:18 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:01:18 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:01:18 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:01:18 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:18 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:01:18 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:18 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:18 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:18 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:18 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:18 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:01:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:01:23 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:01:23 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:23 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:01:24 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:01:24 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:01:24 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:24 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:24 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:01:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:01:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:01:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:01:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:01:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:01:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:01:29 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:01:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:01:29 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:01:30 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:01:30 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:30 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:30 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:01:31 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:32 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:33 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:01:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:01:34 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:01:35 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:01:36 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:01:37 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:38 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1939 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:38 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1939 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:38 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1939 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:01:38 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:01:39 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:01:40 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:01:41 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:01:42 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:01:43 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:01:44 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:01:45 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:01:46 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:47 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:01:48 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:01:49 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:01:50 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:01:51 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:01:52 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:01:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:01:53 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:01:54 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:01:55 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:01:55 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -4861us; resetting the clock
2025-04-02 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:01:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:01:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:01:56 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:01:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:01:57 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:01:58 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:01:59 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:02:00 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:01 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6928 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:01 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6928 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:01 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6928 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:01 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6928 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:01 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:02 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-02 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-02 06:02:03 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-02 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-02 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-02 06:02:04 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-02 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-02 06:02:05 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-02 06:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:06 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-02 06:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-02 06:02:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:07 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-02 06:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-02 06:02:08 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-02 06:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-02 06:02:09 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-02 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-02 06:02:10 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-02 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:11 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-02 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-02 06:02:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-02 06:02:12 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-02 06:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-02 06:02:13 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-02 06:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-02 06:02:14 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-02 06:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-02 06:02:15 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-02 06:02:16 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-02 06:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-02 06:02:17 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-02 06:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-02 06:02:18 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-02 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-02 06:02:19 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-02 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-02 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:20 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-02 06:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-02 06:02:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:21 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-02 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-02 06:02:22 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-02 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-02 06:02:23 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-02 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-02 06:02:24 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-02 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-02 06:02:25 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-02 06:02:26 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-02 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-02 06:02:27 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-02 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-02 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-02 06:02:28 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-02 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:29 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-02 06:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-02 06:02:30 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-02 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-02 06:02:31 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-02 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-02 06:02:32 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-02 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-02 06:02:33 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:34 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-02 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-02 06:02:35 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-02 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-02 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-02 06:02:36 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-02 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-02 06:02:37 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:38 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-02 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-02 06:02:39 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-02 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-02 06:02:40 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-02 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-02 06:02:41 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-02 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:42 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-02 06:02:43 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-02 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-02 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-02 06:02:44 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-02 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-02 06:02:45 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-02 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-02 06:02:46 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-02 06:02:47 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-02 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-02 06:02:48 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-02 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-02 06:02:49 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-02 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-02 06:02:50 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-02 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:51 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-02 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-02 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-02 06:02:52 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-02 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-02 06:02:53 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-02 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-02 06:02:54 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-02 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:02:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:55 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-04-02 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-04-02 06:02:56 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-04-02 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-04-02 06:02:57 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-04-02 06:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-04-02 06:02:58 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-04-02 06:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-04-02 06:02:59 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:02:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:02:59 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19535 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:02:59 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:03:04 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:03:04 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:04 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:03:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:03:09 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:03:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:03:10 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:03:10 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:03:10 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:12 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=639 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:12 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=639 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:12 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=639 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:12 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=639 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:13 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=873 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:13 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=873 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:13 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=873 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:14 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=990 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:14 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=990 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:14 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=990 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:14 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=990 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:14 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=990 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:14 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:19 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:19 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2144 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:03:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:03:24 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:03:24 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:24 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:03:25 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:03:25 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:25 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:25 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:26 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=354 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:26 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:27 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:28 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=915 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=915 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=915 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=915 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=915 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=915 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:29 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:30 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:31 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:03:32 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:33 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:34 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:34 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2212 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:34 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2212 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:03:35 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:36 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:37 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:03:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:03:38 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3265 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3265 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3265 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3265 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3265 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3265 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:39 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:03:40 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:41 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:42 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:03:43 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:44 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:45 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=4530 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:45 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=4530 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:45 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=4530 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:45 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:46 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:03:47 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=5150 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=5150 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:48 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:49 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:50 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=5703 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=5703 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:51 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:52 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:03:53 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:03:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:03:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:03:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:03:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:03:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:03:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:03:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:03:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:03:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:03:59 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:03:59 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:59 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:03:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:03:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:03:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:04:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:04:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:04:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:04:01 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:04:02 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:04:04 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:04:05 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:04:06 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:07 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:04:08 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:04:09 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:04:10 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:11 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:04:12 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:04:13 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:04:14 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:15 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:04:16 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:04:17 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:04:18 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:04:19 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:20 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:04:21 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:04:22 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:04:23 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:04:24 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:04:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:24 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=5631 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:24 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=5631 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:04:25 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:04:26 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:04:27 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:04:28 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6580 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6580 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6580 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6580 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:29 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6580 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:29 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:04:30 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:04:31 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-02 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-02 06:04:32 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-02 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:33 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-02 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-02 06:04:34 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-02 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-02 06:04:35 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-02 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-02 06:04:36 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-02 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-02 06:04:37 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-02 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:38 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-02 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-02 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-02 06:04:39 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-02 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-02 06:04:40 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-02 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-02 06:04:41 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-02 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:42 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-02 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-02 06:04:43 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-02 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-02 06:04:44 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-02 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-02 06:04:45 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-02 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-02 06:04:46 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-02 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-02 06:04:47 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-02 06:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-02 06:04:48 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-02 06:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-02 06:04:49 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-02 06:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-02 06:04:50 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-02 06:04:51 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-02 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-02 06:04:52 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-02 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-02 06:04:53 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-02 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-02 06:04:54 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-02 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-02 06:04:55 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-02 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-02 06:04:56 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-02 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-02 06:04:57 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-02 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-02 06:04:58 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-02 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:04:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:04:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:04:59 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-02 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-02 06:05:00 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-02 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-02 06:05:01 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-02 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-02 06:05:02 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-02 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-02 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:03 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-02 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-02 06:05:04 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-02 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-02 06:05:05 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-02 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-02 06:05:06 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-02 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-02 06:05:07 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-02 06:05:08 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-02 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-02 06:05:09 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-02 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-02 06:05:10 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-02 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-02 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:11 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-02 06:05:12 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-02 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-02 06:05:13 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-02 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-02 06:05:14 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-02 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-02 06:05:15 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:16 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-02 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-02 06:05:17 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-02 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-02 06:05:18 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-02 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-02 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-02 06:05:19 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:20 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-02 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-02 06:05:21 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-02 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-02 06:05:22 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-02 06:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-02 06:05:23 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-02 06:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:05:24 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:05:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:05:24 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:05:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:05:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:05:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:05:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:05:29 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:05:29 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:05:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:05:29 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:05:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:05:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:05:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:05:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:05:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:05:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:05:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:05:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:05:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:05:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:05:34 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:05:34 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:05:34 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:05:35 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:05:35 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:35 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:35 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:05:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:05:36 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:05:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:05:37 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:05:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:05:38 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1004 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1004 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1004 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1004 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:39 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=1004 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:05:39 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:05:40 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:05:41 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:05:42 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:43 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:05:44 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:05:45 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:05:46 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:05:47 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=1 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2891 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:05:48 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:05:49 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:05:50 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:05:51 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:52 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:05:53 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:05:54 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:05:55 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:05:56 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:05:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:05:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:05:57 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:05:58 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:05:59 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:06:00 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:06:01 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:06:02 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:06:03 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:06:04 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:06:05 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:06 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:06:07 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-02 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-02 06:06:08 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-02 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-02 06:06:09 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-02 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-02 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-02 06:06:10 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-02 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:11 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-02 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-02 06:06:12 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-02 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-02 06:06:13 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-02 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-02 06:06:14 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-02 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-02 06:06:15 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-02 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:16 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-02 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-02 06:06:17 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-02 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-02 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-02 06:06:18 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-02 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-02 06:06:19 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-02 06:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-02 06:06:20 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:21 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-02 06:06:21 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-02 06:06:22 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-02 06:06:22 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-02 06:06:23 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-02 06:06:23 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-02 06:06:24 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-02 06:06:24 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-02 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-02 06:06:25 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-02 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-02 06:06:26 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-02 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-02 06:06:27 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-02 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-02 06:06:28 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-02 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-02 06:06:29 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-02 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-02 06:06:30 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-02 06:06:31 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-02 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-02 06:06:32 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-02 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-02 06:06:33 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-02 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-02 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:34 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-02 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-02 06:06:35 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-02 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-02 06:06:36 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-02 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-02 06:06:37 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-02 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-02 06:06:38 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-02 06:06:39 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-02 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 14178
2025-04-02 06:06:40 [DEBUG] clck_gen.py:128 IND CLOCK 14280
2025-04-02 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 14382
2025-04-02 06:06:41 [DEBUG] clck_gen.py:128 IND CLOCK 14484
2025-04-02 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 14586
2025-04-02 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 14688
2025-04-02 06:06:42 [DEBUG] clck_gen.py:128 IND CLOCK 14790
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 14892
2025-04-02 06:06:43 [DEBUG] clck_gen.py:128 IND CLOCK 14994
2025-04-02 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 15096
2025-04-02 06:06:44 [DEBUG] clck_gen.py:128 IND CLOCK 15198
2025-04-02 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 15300
2025-04-02 06:06:45 [DEBUG] clck_gen.py:128 IND CLOCK 15402
2025-04-02 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 15504
2025-04-02 06:06:46 [DEBUG] clck_gen.py:128 IND CLOCK 15606
2025-04-02 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 15708
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:47 [DEBUG] clck_gen.py:128 IND CLOCK 15810
2025-04-02 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 15912
2025-04-02 06:06:48 [DEBUG] clck_gen.py:128 IND CLOCK 16014
2025-04-02 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 16116
2025-04-02 06:06:49 [DEBUG] clck_gen.py:128 IND CLOCK 16218
2025-04-02 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16320
2025-04-02 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16422
2025-04-02 06:06:50 [DEBUG] clck_gen.py:128 IND CLOCK 16524
2025-04-02 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 16626
2025-04-02 06:06:51 [DEBUG] clck_gen.py:128 IND CLOCK 16728
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:52 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=16753 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 16830
2025-04-02 06:06:52 [DEBUG] clck_gen.py:128 IND CLOCK 16932
2025-04-02 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 17034
2025-04-02 06:06:53 [DEBUG] clck_gen.py:128 IND CLOCK 17136
2025-04-02 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 17238
2025-04-02 06:06:54 [DEBUG] clck_gen.py:128 IND CLOCK 17340
2025-04-02 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 17442
2025-04-02 06:06:55 [DEBUG] clck_gen.py:128 IND CLOCK 17544
2025-04-02 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 17646
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:06:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:06:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:06:56 [DEBUG] clck_gen.py:128 IND CLOCK 17748
2025-04-02 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 17850
2025-04-02 06:06:57 [DEBUG] clck_gen.py:128 IND CLOCK 17952
2025-04-02 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18054
2025-04-02 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18156
2025-04-02 06:06:58 [DEBUG] clck_gen.py:128 IND CLOCK 18258
2025-04-02 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18360
2025-04-02 06:06:59 [DEBUG] clck_gen.py:128 IND CLOCK 18462
2025-04-02 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 18564
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:00 [DEBUG] clck_gen.py:128 IND CLOCK 18666
2025-04-02 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 18768
2025-04-02 06:07:01 [DEBUG] clck_gen.py:128 IND CLOCK 18870
2025-04-02 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 18972
2025-04-02 06:07:02 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -4771us; resetting the clock
2025-04-02 06:07:02 [DEBUG] clck_gen.py:128 IND CLOCK 19074
2025-04-02 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 19176
2025-04-02 06:07:03 [DEBUG] clck_gen.py:128 IND CLOCK 19278
2025-04-02 06:07:04 [DEBUG] clck_gen.py:128 IND CLOCK 19380
2025-04-02 06:07:04 [DEBUG] clck_gen.py:128 IND CLOCK 19482
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=19518 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:07:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:07:04 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=19521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:07:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:07:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:07:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:07:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:07:09 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:07:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:07:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:07:09 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:07:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:07:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:07:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:07:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:07:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:07:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:07:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:07:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:07:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:07:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:07:14 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:07:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:07:15 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:07:15 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:15 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:07:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:07:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:07:26 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:27 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:07:28 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:07:29 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:07:30 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:31 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:07:32 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:07:33 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:34 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:35 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:36 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:07:37 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:38 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:38 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:07:39 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:07:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:07:39 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:07:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:07:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:07:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:07:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:07:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:07:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:07:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:07:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:07:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:07:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:07:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:07:44 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:07:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:07:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-02 06:07:45 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-02 06:07:45 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:07:45 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:45 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:07:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:07:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:07:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:07:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:07:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:07:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:07:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:07:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:07:53 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:07:54 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:07:55 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:07:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:07:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:07:56 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:07:57 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:07:58 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:07:59 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:00 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:08:01 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:08:02 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:08:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:03 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=4179 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:04 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:08:05 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:08:06 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:07 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:08:08 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:08:09 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:08:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:10 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:08:11 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:08:12 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:08:13 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:08:14 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:08:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:08:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:08:14 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:08:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:08:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:08:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:08:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:08:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:08:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:08:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:08:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:08:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:08:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:08:19 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:08:19 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:08:19 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:08:19 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:08:19 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:19 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:08:20 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:08:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:08:21 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:08:22 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:08:23 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:08:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:08:24 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:08:25 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:26 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:27 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:08:28 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:08:29 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:08:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:30 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:31 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:32 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2810 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:32 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:08:33 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:08:34 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:08:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:35 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:08:36 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:08:37 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:08:38 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:08:39 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:08:40 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:08:41 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:42 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:43 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:44 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:08:45 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:08:46 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:08:47 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:08:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6219 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:48 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6219 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:48 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:08:49 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:08:50 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=0 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=1 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=6933 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:51 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-02 06:08:52 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-02 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-02 06:08:53 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-02 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:54 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:55 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-02 06:08:56 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-02 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-02 06:08:57 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-02 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-02 06:08:58 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-02 06:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:08:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:08:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-02 06:08:59 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-02 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-02 06:09:00 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-02 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-02 06:09:01 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-02 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:09:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:09:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:02 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-02 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-02 06:09:03 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-02 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-02 06:09:04 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-02 06:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-02 06:09:05 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:09:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:09:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:09:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:06 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-02 06:09:06 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:09:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:09:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:09:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:09:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=10292 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:09:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:09:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:09:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:09:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:09:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:09:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:09:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:09:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:09:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:09:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:09:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:09:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:09:12 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:09:12 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:12 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:09:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:09:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:09:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:09:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:09:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:09:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:09:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:09:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:09:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:09:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:09:19 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:09:20 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:09:21 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:09:22 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:09:23 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:09:24 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:09:25 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:09:26 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:09:27 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:09:28 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:09:29 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:09:30 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:09:31 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:09:32 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:09:33 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:09:34 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:09:35 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:09:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:09:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:09:36 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:36 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:09:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:09:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:09:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:09:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:09:41 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:09:41 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:09:41 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:09:41 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:09:41 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:09:41 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:09:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:09:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:09:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:42 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:09:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:09:43 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:09:44 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:09:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:09:45 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:09:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:09:46 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:09:47 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:09:48 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:09:49 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:09:50 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:09:51 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:09:52 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:09:53 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:09:54 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:09:55 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:09:56 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:09:57 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:09:58 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:09:59 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:10:00 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:10:00 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:10:01 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:10:02 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:10:03 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:10:04 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:10:05 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5229 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5229 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5229 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5229 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5229 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=5230 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:10:10 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:10:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:10:10 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:10 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:10 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:10:12 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -2715us; resetting the clock
2025-04-02 06:10:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:10:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:10:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:10:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:10:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:10:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:10:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:10:20 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:10:21 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:10:22 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:10:23 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:23 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:10:23 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2888 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:23 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2888 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:23 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2888 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:23 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2888 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:10:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:10:28 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:10:28 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:28 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:10:29 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:29 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:10:29 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:29 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:10:30 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:30 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:30 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:10:31 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:31 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:10:32 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:32 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:10:33 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:33 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:33 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:10:34 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:34 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:10:34 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:10:35 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:10:36 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:10:36 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:10:37 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:10:38 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:38 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:38 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2219 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:10:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:10:43 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:10:43 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:43 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:10:44 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:44 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:10:44 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:44 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=143 tn=1 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:44 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=143 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:44 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=143 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:44 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=143 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:44 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=143 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:44 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=143 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:44 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=374 tn=1 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:45 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=374 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=812 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=812 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=812 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:47 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=815 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=815 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=815 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=815 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=815 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=815 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:10:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:10:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:10:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:10:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:10:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:10:52 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:10:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:10:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:10:53 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:10:53 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:53 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:10:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD HANDOVER
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:10:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:10:54 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:55 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:10:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:10:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:10:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:10:55 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:00 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:00 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:00 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:05 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:11:05 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-02 06:11:05 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-02 06:11:05 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:05 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:05 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=0 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=1 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=2 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=3 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=4 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=5 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=6 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=436 tn=7 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=0 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=1 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=2 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=3 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=4 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=5 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=6 bl=148 pwr=0
2025-04-02 06:11:07 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=438): ver=1 fn=437 tn=7 bl=148 pwr=0
2025-04-02 06:11:07 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:08 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:09 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:10 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:11:11 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:11 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1305 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1305 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1305 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1305 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1305 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:11 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1306 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:16 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:11:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:11:16 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:16 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:16 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:18 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:11:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:19 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:20 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:21 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:21 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1203 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:27 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:27 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:27 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:32 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:11:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-02 06:11:32 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-02 06:11:32 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:32 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:32 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:11:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:11:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:33 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=4 bl=148 pwr=0
2025-04-02 06:11:33 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=5 bl=148 pwr=0
2025-04-02 06:11:33 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=6 bl=148 pwr=0
2025-04-02 06:11:33 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=220): ver=1 fn=219 tn=7 bl=148 pwr=0
2025-04-02 06:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:11:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:11:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:11:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:11:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:11:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:11:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:11:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:11:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:11:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:11:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:11:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:11:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:11:43 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:11:44 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:11:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:11:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:11:47 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:11:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:47 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:47 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:52 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:52 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:11:52 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:11:52 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:52 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:52 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:11:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:11:52 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:52 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:11:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:11:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:11:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:11:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:11:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:11:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:11:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:11:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:11:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:11:59 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:59 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:59 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:11:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:11:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:11:59 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:11:59 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:11:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:11:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:12:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:12:01 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:12:02 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=0 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=1 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=2 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=3 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=4 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=5 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=6 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=981 tn=7 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=0 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=1 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=2 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=3 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=4 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=5 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=6 bl=148 pwr=0
2025-04-02 06:12:03 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=983): ver=1 fn=982 tn=7 bl=148 pwr=0
2025-04-02 06:12:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:03 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:03 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1045 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:12:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:12:08 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:12:08 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:08 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:12:09 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:09 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:09 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:12:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:12:09 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:09 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:09 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:12:10 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:12:11 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:12 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:12:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=0 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=1 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=2 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=3 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=4 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=5 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=6 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1019 tn=7 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=0 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=1 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=2 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=3 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=4 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=5 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=6 bl=148 pwr=0
2025-04-02 06:12:13 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=1021): ver=1 fn=1020 tn=7 bl=148 pwr=0
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:13 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:12:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1087 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1087 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1087 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1087 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1087 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:13 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1087 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:12:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:12:18 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:12:18 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:19 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:12:19 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:19 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:19 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:12:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:12:19 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:19 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:19 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:12:20 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:12:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:12:21 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:12:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:12:22 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:23 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:12:24 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:12:25 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:12:26 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1685 tn=5 bl=148 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1685 tn=6 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1685 tn=7 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=0 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=1 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=2 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=3 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=4 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=5 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=6 pwr=0
2025-04-02 06:12:26 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=1687): fn=1686 tn=7 pwr=0
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:26 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:12:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:12:31 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:12:31 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:31 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:12:32 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:32 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:32 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:12:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:12:32 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:32 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:32 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:12:33 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:12:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:12:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:12:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:12:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:12:38 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:12:39 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:12:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:12:40 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:40 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:40 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:12:41 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:12:42 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:12:43 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:12:44 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:12:45 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:12:46 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:12:47 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:12:48 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:48 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:12:48 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3609 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:48 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3609 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:48 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3609 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:48 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3609 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:48 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3609 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:48 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3609 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:12:53 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:12:53 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:12:53 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:12:53 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:53 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:53 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:12:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:12:53 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:12:53 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:54 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=316 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=316 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=316 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=316 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=316 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=318 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:12:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:12:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:12:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:12:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:12:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:12:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:12:59 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:12:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:12:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:13:00 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:00 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:00 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:00 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:00 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:13:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:13:02 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:13:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:13:03 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:04 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:13:05 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:13:06 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:13:07 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:08 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:08 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:08 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:13:09 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:13:10 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:13:11 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:13:12 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:13:13 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:13:14 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:13:15 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:13:16 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:13:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:13:16 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:13:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:16 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:13:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:13:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:13:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:13:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:13:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:13:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:13:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:13:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:13:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:13:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:13:21 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:13:21 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:13:21 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=0 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=1 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=2 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=3 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=4 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=5 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=6 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=104 tn=7 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=0 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=1 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=2 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=3 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=4 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=5 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=6 bl=148 pwr=0
2025-04-02 06:13:21 [WARNING] transceiver.py:330 (BTS@172.18.30.20:5700) Stale TRXD message (fn=106): ver=1 fn=105 tn=7 bl=148 pwr=0
2025-04-02 06:13:22 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:22 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:22 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:22 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:22 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:22 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:13:23 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:13:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:23 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:13:24 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:13:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:24 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:13:25 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:25 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:26 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:13:27 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:13:27 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:13:28 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:13:29 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:30 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:30 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:13:30 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:13:31 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:13:32 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:13:33 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:13:34 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:13:35 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:13:36 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:13:37 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:38 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:38 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:13:38 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:13:39 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:13:40 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:13:41 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:13:42 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:13:43 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:13:44 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:13:45 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:46 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:46 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:46 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:13:46 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:13:47 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:13:47 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:13:48 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:13:49 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:13:49 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:13:50 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:13:51 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:13:52 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:13:53 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:13:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:13:54 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7095 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:13:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7095 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7095 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7095 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7095 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7095 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:54 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=7096 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:13:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:13:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:13:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:13:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:13:59 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:13:59 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:13:59 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:59 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:59 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:13:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:13:59 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:13:59 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:13:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:14:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:14:00 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:14:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:14:01 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:14:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:14:02 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:14:03 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:14:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:14:04 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:14:05 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:14:06 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:14:07 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:14:07 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:07 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:07 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:14:08 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:14:09 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:14:10 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:14:11 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:14:12 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:14:13 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:14:14 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:14:15 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:15 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3605 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:14:15 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3605 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:14:15 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=3605 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:15 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:15 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:14:16 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:14:17 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:14:18 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:14:19 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:14:20 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:14:21 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:14:22 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:14:23 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:23 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:23 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:14:24 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:14:25 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:14:26 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:14:27 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -24057us; resetting the clock
2025-04-02 06:14:27 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:14:28 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:14:29 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:14:30 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:14:31 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:32 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:32 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-02 06:14:32 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-02 06:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-02 06:14:33 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-02 06:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-02 06:14:34 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-02 06:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-02 06:14:35 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-02 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-02 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-02 06:14:36 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-02 06:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-02 06:14:37 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-02 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-02 06:14:38 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-02 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-02 06:14:39 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:40 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:40 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-02 06:14:40 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-02 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-02 06:14:41 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-02 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-02 06:14:42 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-02 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-02 06:14:43 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-02 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-02 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-02 06:14:44 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-02 06:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-02 06:14:45 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-02 06:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-02 06:14:46 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-02 06:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-02 06:14:47 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:48 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:48 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-02 06:14:48 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-02 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-02 06:14:49 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-02 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-02 06:14:50 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-02 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-02 06:14:51 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-02 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-02 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-02 06:14:52 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-02 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-02 06:14:53 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-02 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-02 06:14:54 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-02 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-02 06:14:55 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:14:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:14:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-02 06:14:56 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:14:56 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:14:56 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-02 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-02 06:14:57 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-02 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-02 06:14:58 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-02 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-02 06:14:59 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-02 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-02 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-02 06:15:00 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-02 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 13464
2025-04-02 06:15:01 [DEBUG] clck_gen.py:128 IND CLOCK 13566
2025-04-02 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 13668
2025-04-02 06:15:02 [DEBUG] clck_gen.py:128 IND CLOCK 13770
2025-04-02 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 13872
2025-04-02 06:15:03 [DEBUG] clck_gen.py:128 IND CLOCK 13974
2025-04-02 06:15:04 [DEBUG] clck_gen.py:128 IND CLOCK 14076
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=14080 tn=2 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=14080 tn=3 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=14080 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=14080 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=14080 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=14080 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:04 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=14081 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=14081 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=14081 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=14081 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=14081 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:04 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=14081 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:15:09 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:15:09 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:15:09 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:15:09 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:15:09 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:15:09 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:15:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:15:09 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:15:09 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:15:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:10 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:15:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:11 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:12 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:15:13 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:15:14 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:15:15 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:15:16 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:15:17 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:15:17 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:15:17 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:15:18 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:15:19 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:15:20 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:15:21 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:15:22 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:15:23 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:15:24 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:15:25 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:15:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:15:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:15:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:15:31 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:15:31 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:15:31 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:15:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:15:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:15:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:15:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:15:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:15:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:15:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:15:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:15:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:15:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:15:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:15:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:15:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:39 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:39 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:15:44 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:15:44 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:15:44 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:15:44 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:15:44 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:44 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:15:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:45 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=291): fn=290 tn=5 bl=148 pwr=0
2025-04-02 06:15:45 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=291): fn=290 tn=6 pwr=0
2025-04-02 06:15:45 [WARNING] transceiver.py:330 (MS@172.18.30.22:6700) Stale TRXD message (fn=291): fn=290 tn=7 pwr=0
2025-04-02 06:15:45 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:15:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:46 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:47 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:48 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:15:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:49 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:15:50 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:15:51 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:15:52 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:15:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1863 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1863 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1863 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1863 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1863 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:53 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:15:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:15:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:15:58 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:15:58 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:15:58 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:15:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:15:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:15:58 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:15:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:15:59 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:16:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:16:00 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:16:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:16:01 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:16:02 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:16:03 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:16:04 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:16:05 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:05 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:16:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:05 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:16:10 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:16:10 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:16:10 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:16:10 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:16:10 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:16:10 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:16:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:16:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:16:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:11 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:12 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:13 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:14 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:15 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:16:16 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:16:17 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:16:18 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:16:19 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:16:20 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:20 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:16:20 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:16:20 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:20 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:16:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:16:25 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:16:25 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:25 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:16:26 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:16:26 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:16:26 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:16:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:26 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:16:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:27 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:16:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:28 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:29 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:30 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:16:31 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:16:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:16:32 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:16:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:16:33 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:16:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:16:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:34 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:16:35 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:16:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:35 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:16:36 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:16:37 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:16:37 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:16:38 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:16:38 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:16:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:39 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:16:39 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:16:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:16:40 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:16:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:16:41 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:16:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:16:42 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:16:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:43 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:16:43 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:16:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:16:44 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:16:45 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4450 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:46 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:16:51 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:16:51 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:16:51 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:16:51 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:16:51 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:16:51 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:16:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:16:51 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:16:51 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD NOHANDOVER
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:51 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD NOHANDOVER
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:52 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:16:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:16:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:16:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:16:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:16:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:16:57 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:16:57 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:16:57 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:16:58 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:16:58 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:16:58 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:16:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:16:58 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:16:58 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD NOHANDOVER
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD NOHANDOVER
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:16:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:16:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:16:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:16:58 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:16:58 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=302 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:17:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:17:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:17:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:17:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:17:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:17:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:17:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:17:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:17:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:17:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:17:03 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:17:03 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:17:03 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:17:04 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:17:04 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:04 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:17:04 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:17:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:04 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:17:05 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:17:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:17:06 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:17:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:17:07 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:17:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:17:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:17:08 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:17:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:17:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:17:09 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:17:10 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:17:11 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:17:12 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:17:13 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:17:14 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:17:15 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:17:16 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:17:16 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:17:17 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:17:17 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:17:18 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:17:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:19 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:17:20 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:17:21 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:17:22 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:17:23 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:17:24 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:17:25 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 4794
2025-04-02 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 4896
2025-04-02 06:17:26 [DEBUG] clck_gen.py:128 IND CLOCK 4998
2025-04-02 06:17:27 [DEBUG] clck_gen.py:128 IND CLOCK 5100
2025-04-02 06:17:27 [DEBUG] clck_gen.py:128 IND CLOCK 5202
2025-04-02 06:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 5304
2025-04-02 06:17:28 [DEBUG] clck_gen.py:128 IND CLOCK 5406
2025-04-02 06:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 5508
2025-04-02 06:17:29 [DEBUG] clck_gen.py:128 IND CLOCK 5610
2025-04-02 06:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 5712
2025-04-02 06:17:30 [DEBUG] clck_gen.py:128 IND CLOCK 5814
2025-04-02 06:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 5916
2025-04-02 06:17:31 [DEBUG] clck_gen.py:128 IND CLOCK 6018
2025-04-02 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 6120
2025-04-02 06:17:32 [DEBUG] clck_gen.py:128 IND CLOCK 6222
2025-04-02 06:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 6324
2025-04-02 06:17:33 [DEBUG] clck_gen.py:128 IND CLOCK 6426
2025-04-02 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 6528
2025-04-02 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 6630
2025-04-02 06:17:34 [DEBUG] clck_gen.py:128 IND CLOCK 6732
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:17:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 6834
2025-04-02 06:17:35 [DEBUG] clck_gen.py:128 IND CLOCK 6936
2025-04-02 06:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 7038
2025-04-02 06:17:36 [DEBUG] clck_gen.py:128 IND CLOCK 7140
2025-04-02 06:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 7242
2025-04-02 06:17:37 [DEBUG] clck_gen.py:128 IND CLOCK 7344
2025-04-02 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 7446
2025-04-02 06:17:38 [DEBUG] clck_gen.py:128 IND CLOCK 7548
2025-04-02 06:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 7650
2025-04-02 06:17:39 [DEBUG] clck_gen.py:128 IND CLOCK 7752
2025-04-02 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 7854
2025-04-02 06:17:40 [DEBUG] clck_gen.py:128 IND CLOCK 7956
2025-04-02 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 8058
2025-04-02 06:17:41 [DEBUG] clck_gen.py:128 IND CLOCK 8160
2025-04-02 06:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 8262
2025-04-02 06:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 8364
2025-04-02 06:17:42 [DEBUG] clck_gen.py:128 IND CLOCK 8466
2025-04-02 06:17:43 [DEBUG] clck_gen.py:128 IND CLOCK 8568
2025-04-02 06:17:43 [DEBUG] clck_gen.py:128 IND CLOCK 8670
2025-04-02 06:17:44 [DEBUG] clck_gen.py:128 IND CLOCK 8772
2025-04-02 06:17:44 [DEBUG] clck_gen.py:128 IND CLOCK 8874
2025-04-02 06:17:45 [DEBUG] clck_gen.py:128 IND CLOCK 8976
2025-04-02 06:17:45 [DEBUG] clck_gen.py:128 IND CLOCK 9078
2025-04-02 06:17:46 [DEBUG] clck_gen.py:128 IND CLOCK 9180
2025-04-02 06:17:46 [DEBUG] clck_gen.py:128 IND CLOCK 9282
2025-04-02 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 9384
2025-04-02 06:17:47 [DEBUG] clck_gen.py:128 IND CLOCK 9486
2025-04-02 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 9588
2025-04-02 06:17:48 [DEBUG] clck_gen.py:128 IND CLOCK 9690
2025-04-02 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 9792
2025-04-02 06:17:49 [DEBUG] clck_gen.py:128 IND CLOCK 9894
2025-04-02 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 9996
2025-04-02 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 10098
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:17:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:17:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:17:50 [DEBUG] clck_gen.py:128 IND CLOCK 10200
2025-04-02 06:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 10302
2025-04-02 06:17:51 [DEBUG] clck_gen.py:128 IND CLOCK 10404
2025-04-02 06:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 10506
2025-04-02 06:17:52 [DEBUG] clck_gen.py:128 IND CLOCK 10608
2025-04-02 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 10710
2025-04-02 06:17:53 [DEBUG] clck_gen.py:128 IND CLOCK 10812
2025-04-02 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 10914
2025-04-02 06:17:54 [DEBUG] clck_gen.py:128 IND CLOCK 11016
2025-04-02 06:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 11118
2025-04-02 06:17:55 [DEBUG] clck_gen.py:128 IND CLOCK 11220
2025-04-02 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 11322
2025-04-02 06:17:56 [DEBUG] clck_gen.py:128 IND CLOCK 11424
2025-04-02 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 11526
2025-04-02 06:17:57 [DEBUG] clck_gen.py:128 IND CLOCK 11628
2025-04-02 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 11730
2025-04-02 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 11832
2025-04-02 06:17:58 [DEBUG] clck_gen.py:128 IND CLOCK 11934
2025-04-02 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 12036
2025-04-02 06:17:59 [DEBUG] clck_gen.py:128 IND CLOCK 12138
2025-04-02 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 12240
2025-04-02 06:18:00 [DEBUG] clck_gen.py:128 IND CLOCK 12342
2025-04-02 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 12444
2025-04-02 06:18:01 [DEBUG] clck_gen.py:128 IND CLOCK 12546
2025-04-02 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 12648
2025-04-02 06:18:02 [DEBUG] clck_gen.py:128 IND CLOCK 12750
2025-04-02 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 12852
2025-04-02 06:18:03 [DEBUG] clck_gen.py:128 IND CLOCK 12954
2025-04-02 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 13056
2025-04-02 06:18:04 [DEBUG] clck_gen.py:128 IND CLOCK 13158
2025-04-02 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 13260
2025-04-02 06:18:05 [DEBUG] clck_gen.py:128 IND CLOCK 13362
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:18:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:06 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13460 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13460 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:06 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=13461 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:18:11 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:18:11 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:11 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:18:16 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:18:16 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:18:16 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:18:16 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:18:16 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:18:16 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:18:16 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:18:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:18:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:17 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:18:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:18 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:18:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:18:19 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:18:20 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:18:21 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:18:22 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:18:23 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:18:24 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:18:25 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:18:26 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:18:27 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:18:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2377 tn=4 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2377 tn=5 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2377 tn=6 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (MS@172.18.30.22:6700) RX TRXD message (fn=2377 tn=7 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:27 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:27 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:18:32 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:18:32 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:18:32 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:18:32 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:18:32 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:18:32 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:18:32 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:18:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:33 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:18:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:34 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:18:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:18:35 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:18:36 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:18:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:18:37 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:18:38 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:18:39 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:18:40 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:18:41 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:18:42 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:18:43 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:18:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:43 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:43 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2485 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:18:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:18:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:18:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:18:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:18:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:18:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:18:48 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:18:48 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:18:48 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:18:49 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:49 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:18:49 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:18:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:18:49 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:18:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:18:49 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:18:50 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:18:50 [DEBUG] fake_trx.py:264 (MS@172.18.30.22:6700) Recv SETTA cmd
2025-04-02 06:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:18:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:51 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:18:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:52 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:18:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:18:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:18:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:18:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:18:53 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:18:54 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:18:55 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:18:56 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:18:57 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:18:58 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:18:59 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:19:00 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:19:01 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:19:02 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:19:02 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:19:03 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:19:04 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:19:05 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:19:06 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:19:06 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:19:07 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:19:07 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:19:07 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:19:08 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:19:08 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:09 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:19:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:09 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4475 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:09 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4475 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:09 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4475 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:09 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4475 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:09 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4475 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:09 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4475 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:19:14 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:19:14 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:19:14 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:19:14 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:19:14 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:14 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:19:14 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:19:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:15 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:19:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:16 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:17 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:18 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:19:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:19:19 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:19:20 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:19:21 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:19:22 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:19:23 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:19:24 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:19:24 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:19:25 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2382 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2382 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2382 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2382 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2382 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2383 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:19:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:19:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:19:30 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:19:30 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:19:30 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:30 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:19:30 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:19:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:30 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:31 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:19:31 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:19:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:19:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:34 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:19:35 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:19:36 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:19:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:37 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:37 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=1566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:19:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:19:42 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:19:42 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:42 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:19:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:43 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:19:43 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:19:43 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:43 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:19:43 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:19:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:43 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:19:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:44 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:19:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:45 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:46 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:47 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:19:48 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:19:49 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:19:50 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:19:51 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:19:52 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:53 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:19:58 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:19:58 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:19:58 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:19:58 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:58 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:19:58 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:19:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:19:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:19:59 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:19:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:00 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:00 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:20:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:20:05 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:20:05 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:05 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:20:06 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:20:06 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:06 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:06 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:06 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:07 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:20:12 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:20:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:20:12 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:20:12 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:12 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:12 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:20:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:20:13 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:20:14 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:15 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:20:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:20:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:20:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:20:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:20:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:20:20 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:20:21 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:20:22 [WARNING] clck_gen.py:108 CLCKGen: time overrun by -569us; resetting the clock
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:22 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:20:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:20:23 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:20:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:20:24 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:20:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:25 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:20:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2936 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2936 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2936 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2936 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2936 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:25 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=2936 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:20:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:20:30 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:20:30 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:30 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:20:31 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:20:31 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:31 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:31 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:32 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:33 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:20:34 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:34 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:20:35 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:35 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:20:36 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:20:36 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:20:37 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:20:37 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:20:38 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:20:38 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:20:39 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:20:40 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:20:40 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:20:40 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:20:41 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:20:41 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:20:42 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:20:42 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:20:43 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:20:44 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:44 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:20:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:20:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:20:50 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:20:50 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:20:50 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:20:50 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:50 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:50 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:51 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:20:51 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:20:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:20:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:20:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:20:52 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:20:53 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:20:54 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:20:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:20:55 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:20:56 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:20:57 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:20:58 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:20:59 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:20:59 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:21:00 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:21:00 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:21:01 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:21:01 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:21:02 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:21:02 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:21:03 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:21:03 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:21:04 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:21:04 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:21:05 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:21:05 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:21:06 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:21:06 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:21:06 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:21:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:21:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:21:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:21:07 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:07 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=3739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:21:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:21:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:21:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:21:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:21:12 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:21:12 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:21:12 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:21:12 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:21:12 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:21:12 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:21:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:21:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:13 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:14 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:15 [DEBUG] clck_gen.py:128 IND CLOCK 714
2025-04-02 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 816
2025-04-02 06:21:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 918
2025-04-02 06:21:16 [DEBUG] clck_gen.py:128 IND CLOCK 1020
2025-04-02 06:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 1122
2025-04-02 06:21:17 [DEBUG] clck_gen.py:128 IND CLOCK 1224
2025-04-02 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 1326
2025-04-02 06:21:18 [DEBUG] clck_gen.py:128 IND CLOCK 1428
2025-04-02 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 1530
2025-04-02 06:21:19 [DEBUG] clck_gen.py:128 IND CLOCK 1632
2025-04-02 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 1734
2025-04-02 06:21:20 [DEBUG] clck_gen.py:128 IND CLOCK 1836
2025-04-02 06:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 1938
2025-04-02 06:21:21 [DEBUG] clck_gen.py:128 IND CLOCK 2040
2025-04-02 06:21:22 [DEBUG] clck_gen.py:128 IND CLOCK 2142
2025-04-02 06:21:22 [DEBUG] clck_gen.py:128 IND CLOCK 2244
2025-04-02 06:21:23 [DEBUG] clck_gen.py:128 IND CLOCK 2346
2025-04-02 06:21:23 [DEBUG] clck_gen.py:128 IND CLOCK 2448
2025-04-02 06:21:24 [DEBUG] clck_gen.py:128 IND CLOCK 2550
2025-04-02 06:21:24 [DEBUG] clck_gen.py:128 IND CLOCK 2652
2025-04-02 06:21:24 [DEBUG] clck_gen.py:128 IND CLOCK 2754
2025-04-02 06:21:25 [DEBUG] clck_gen.py:128 IND CLOCK 2856
2025-04-02 06:21:25 [DEBUG] clck_gen.py:128 IND CLOCK 2958
2025-04-02 06:21:26 [DEBUG] clck_gen.py:128 IND CLOCK 3060
2025-04-02 06:21:26 [DEBUG] clck_gen.py:128 IND CLOCK 3162
2025-04-02 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 3264
2025-04-02 06:21:27 [DEBUG] clck_gen.py:128 IND CLOCK 3366
2025-04-02 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 3468
2025-04-02 06:21:28 [DEBUG] clck_gen.py:128 IND CLOCK 3570
2025-04-02 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 3672
2025-04-02 06:21:29 [DEBUG] clck_gen.py:128 IND CLOCK 3774
2025-04-02 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 3876
2025-04-02 06:21:30 [DEBUG] clck_gen.py:128 IND CLOCK 3978
2025-04-02 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 4080
2025-04-02 06:21:31 [DEBUG] clck_gen.py:128 IND CLOCK 4182
2025-04-02 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 4284
2025-04-02 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 4386
2025-04-02 06:21:32 [DEBUG] clck_gen.py:128 IND CLOCK 4488
2025-04-02 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 4590
2025-04-02 06:21:33 [DEBUG] clck_gen.py:128 IND CLOCK 4692
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:21:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:21:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:21:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:21:34 [INFO] transceiver.py:276 Stopping clock generator
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:34 [WARNING] transceiver.py:287 (BTS@172.18.30.20:5700) RX TRXD message (ver=1 fn=4775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.30.20:5700) Recv POWEROFF cmd
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.30.20:5700) Stopping transceiver...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.30.20:5700) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:21:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.30.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.30.20:5700) Recv SETFORMAT cmd
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.30.20:5700) TRXD header version 1 -> 1
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.30.20:5700/1) Recv RXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.30.20:5700/1) Recv TXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:21:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.30.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.30.20:5700/1) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.30.20:5700/1) Recv NOMTXPOWER cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.30.20:5700/1) Recv SETFORMAT cmd
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.30.20:5700/1) TRXD header version 1 -> 1
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.30.20:5700/2) Recv RXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.30.20:5700/2) Recv TXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:21:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.30.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.30.20:5700/2) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.30.20:5700/2) Recv NOMTXPOWER cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.30.20:5700/2) Recv SETFORMAT cmd
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.30.20:5700/2) TRXD header version 1 -> 1
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.30.20:5700/3) Recv RXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.30.20:5700/3) Recv TXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:21:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.30.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.30.20:5700/3) Recv RFMUTE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.30.20:5700/3) Recv NOMTXPOWER cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.30.20:5700/3) Recv SETFORMAT cmd
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.30.20:5700/3) TRXD header version 1 -> 1
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.30.20:5700) Recv RXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETTSC
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETTSC
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.30.20:5700) Recv TXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETTSC
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETRXGAIN
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETTSC
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETRXGAIN
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.30.20:5700) Recv NOMTXPOWER cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETRXGAIN
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.30.20:5700) Recv POWERON CMD
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.30.20:5700) Starting transceiver...
2025-04-02 06:21:39 [INFO] transceiver.py:273 Starting clock generator
2025-04-02 06:21:39 [INFO] clck_gen.py:93 CLCKGen: Setting real time process scheduler to SCHED_RR, priority 31
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETRXGAIN
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.30.20:5700/1) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.30.20:5700/2) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.30.20:5700/3) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 0
2025-04-02 06:21:39 [DEBUG] clck_gen.py:128 IND CLOCK 102
2025-04-02 06:21:39 [DEBUG] fake_trx.py:273 (BTS@172.18.30.20:5700) Recv FAKE_TOA cmd
2025-04-02 06:21:39 [DEBUG] fake_trx.py:292 (BTS@172.18.30.20:5700) Recv FAKE_RSSI cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.30.20:5700) Ignore CMD NOHANDOVER
2025-04-02 06:21:39 [DEBUG] fake_trx.py:317 (BTS@172.18.30.20:5700) Recv FAKE_CI cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.30.22:6700) Recv POWEROFF cmd
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.30.22:6700) Stopping transceiver...
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD ECHO
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.30.22:6700) Ignore CMD SETSLOT
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.30.22:6700) Recv RXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.30.22:6700) Recv TXTUNE cmd
2025-04-02 06:21:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.30.22:6700) Recv POWERON CMD
2025-04-02 06:21:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.30.22:6700) Starting transceiver...
2025-04-02 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 204
2025-04-02 06:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:40 [DEBUG] clck_gen.py:128 IND CLOCK 306
2025-04-02 06:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 408
2025-04-02 06:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd
2025-04-02 06:21:41 [DEBUG] clck_gen.py:128 IND CLOCK 510
2025-04-02 06:21:42 [DEBUG] clck_gen.py:128 IND CLOCK 612
2025-04-02 06:21:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.30.20:5700) Recv SETPOWER cmd
2025-04-02 06:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.30.20:5700/1) Recv SETPOWER cmd
2025-04-02 06:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.30.20:5700/2) Recv SETPOWER cmd
2025-04-02 06:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.30.20:5700/3) Recv SETPOWER cmd