2024-10-28 11:46:57 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.182.20:5700'
2024-10-28 11:46:57 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.182.20:5802)
2024-10-28 11:46:57 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.182.20:5801)
2024-10-28 11:46:57 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.182.22:6700'
2024-10-28 11:46:57 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.182.22:6802)
2024-10-28 11:46:57 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.182.22:6801)
2024-10-28 11:46:57 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.182.20:5700/1'
2024-10-28 11:46:57 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.182.20:5804)
2024-10-28 11:46:57 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.182.20:5803)
2024-10-28 11:46:57 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.182.20:5700/2'
2024-10-28 11:46:57 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.182.20:5806)
2024-10-28 11:46:57 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.182.20:5805)
2024-10-28 11:46:57 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.182.20:5700/3'
2024-10-28 11:46:57 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.182.20:5808)
2024-10-28 11:46:57 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.182.20:5807)
2024-10-28 11:46:57 [INFO] fake_trx.py:423 Init complete
2024-10-28 11:46:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:46:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:46:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:46:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:46:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:46:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 0 -> 1
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 0 -> 1
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 0 -> 1
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 0 -> 1
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:47:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:47:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:47:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:47:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:47:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:47:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:47:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:47:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
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2024-10-28 11:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
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2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
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2024-10-28 11:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
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2024-10-28 11:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
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2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
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2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:47:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:47:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:47:28 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:47:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:28 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:47:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:47:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:47:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:47:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:47:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:47:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:47:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:47:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:47:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:47:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:47:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:47:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:47:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:47:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:47:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:47:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:47:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:47:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:47:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:47:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:47:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:47:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:47:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:47:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:47:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:48:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 11:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 11:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 11:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 11:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 11:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 11:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 11:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 11:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 11:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 11:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 11:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 11:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 11:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 11:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 11:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 11:48:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 11:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 11:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 11:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 11:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 11:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 11:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 11:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 11:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 11:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 11:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 11:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 11:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 11:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 11:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 11:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 11:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 11:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 11:48:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 11:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 11:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 11:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 11:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 11:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 11:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 11:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 11:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 11:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 11:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 11:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 11:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 11:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 11:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 11:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 11:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 11:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 11:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 11:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 11:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 11:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 11:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 11:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 11:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 11:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 11:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 11:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 11:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 11:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 11:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 11:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 11:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 11:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 11:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 11:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 11:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 11:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 11:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 11:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 11:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 11:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 11:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 11:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 11:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 11:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 11:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:48:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:48:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 11:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 11:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 11:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 11:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 11:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 11:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 11:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 11:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 11:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 11:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 11:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 11:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 11:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 11:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 11:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 11:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 11:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 11:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 11:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 11:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 11:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 11:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 11:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 11:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-28 11:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-28 11:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-28 11:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-28 11:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-28 11:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-28 11:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-28 11:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-28 11:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:49:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:49:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:49:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:49:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:49:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:49:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:49:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:49:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:49:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:49:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:49:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:49:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:49:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:49:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:49:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:49:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:49:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:49:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:49:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:49:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:49:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:49:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:49:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:49:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:49:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:49:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:49:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:49:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:49:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:49:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:49:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:49:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:49:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:49:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:49:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:49:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:49:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:49:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:49:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:49:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:49:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:50:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:50:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:50:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:50:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:50:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:50:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:50:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:50:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:50:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:50:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:50:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:50:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:50:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:50:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:50:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:50:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:50:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:50:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:50:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:50:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:50:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 11:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 11:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 11:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 11:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 11:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 11:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 11:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 11:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 11:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 11:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 11:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 11:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 11:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 11:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 11:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 11:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 11:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 11:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 11:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 11:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 11:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 11:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 11:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 11:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 11:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 11:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 11:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:50:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:50:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 11:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 11:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 11:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 11:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 11:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 11:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 11:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 11:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 11:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 11:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 11:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 11:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 11:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 11:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 11:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 11:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 11:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 11:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 11:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 11:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 11:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 11:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 11:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 11:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 11:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 11:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 11:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 11:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 11:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 11:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 11:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 11:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 11:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 11:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 11:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 11:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 11:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 11:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 11:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 11:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 11:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 11:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 11:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 11:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 11:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 11:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 11:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 11:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 11:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 11:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 11:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 11:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 11:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 11:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 11:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 11:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 11:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 11:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 11:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 11:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 11:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 11:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 11:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 11:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 11:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 11:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 11:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 11:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 11:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 11:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 11:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 11:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 11:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 11:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 11:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 11:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 11:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 11:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:51:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:51:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:51:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:51:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:51:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:51:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:51:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:51:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:51:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:51:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:51:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:51:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:51:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:51:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:51:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:51:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:51:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:51:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:51:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:51:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:51:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:51:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:51:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:51:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:51:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:51:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:51:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:51:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:51:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:51:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:51:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:51:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:51:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 11:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 11:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 11:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 11:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 11:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 11:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 11:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 11:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 11:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 11:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 11:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 11:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 11:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 11:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 11:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 11:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 11:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 11:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 11:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 11:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 11:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 11:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 11:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 11:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 11:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 11:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 11:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 11:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 11:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 11:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 11:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 11:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 11:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 11:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 11:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 11:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 11:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 11:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 11:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 11:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 11:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 11:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 11:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 11:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 11:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 11:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 11:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 11:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 11:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 11:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 11:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 11:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 11:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 11:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 11:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 11:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 11:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 11:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 11:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 11:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 11:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 11:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 11:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 11:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 11:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 11:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 11:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 11:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 11:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 11:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 11:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 11:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 11:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 11:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 11:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:52:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:52:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 11:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 11:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 11:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 11:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 11:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 11:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 11:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 11:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 11:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 11:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 11:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 11:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 11:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 11:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 11:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 11:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 11:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 11:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 11:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 11:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 11:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 11:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 11:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 11:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 11:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 11:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 11:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 11:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 11:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 11:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 11:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 11:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-28 11:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-28 11:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-28 11:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-28 11:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-28 11:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-28 11:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-28 11:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-28 11:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:53:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:53:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:53:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19521 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:53:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19521 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:53:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19521 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:53:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19521 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:53:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19521 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:53:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19521 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:53:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:53:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:53:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:53:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:53:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:53:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:53:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:53:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:53:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:53:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:53:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:53:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:53:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:53:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:53:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:53:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:53:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:53:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:53:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:53:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:53:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:53:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:53:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:53:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:53:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:53:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:53:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:53:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:53:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:53:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:53:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:53:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:53:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:53:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:53:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:53:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:53:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:53:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:53:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:53:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:53:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:54:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:54:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:54:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:54:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:54:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:54:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 11:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:54:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:54:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:54:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:54:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:54:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:54:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:54:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:54:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:54:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:54:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:54:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:54:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:54:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:54:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:54:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:54:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:54:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:54:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:54:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 11:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 11:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 11:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 11:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 11:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 11:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 11:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 11:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 11:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 11:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 11:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 11:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 11:55:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 11:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 11:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 11:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 11:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 11:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 11:55:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 11:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 11:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 11:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 11:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 11:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 11:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 11:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 11:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 11:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 11:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 11:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 11:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 11:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:55:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:55:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:55:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:55:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:55:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:55:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:55:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:55:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:55:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:55:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:55:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:55:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:55:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:55:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:55:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:55:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:55:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:55:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:55:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:55:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:55:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:55:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:55:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:56:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:56:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:56:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:56:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:56:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2898 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:56:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:56:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:56:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:56:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:56:19 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:56:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:19 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:56:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:56:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:56:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:56:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:56:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:56:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:56:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:56:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:56:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:56:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:56:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:56:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=709 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:56:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:56:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:56:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:56:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:56:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:56:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:56:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:56:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:56:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:56:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:56:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:56:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:56:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:56:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:56:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:56:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:56:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:56:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:56:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:56:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:56:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:56:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:56:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:56:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:57:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:57:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:57:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:57:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:57:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:57:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:57:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:57:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:57:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:57:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:57:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:57:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:57:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:57:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:57:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:57:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:57:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:57:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:57:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:57:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:57:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:57:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:57:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:57:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:57:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:57:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:57:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:57:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:57:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:57:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:57:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:57:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:57:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:57:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:57:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:57:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:57:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:57:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:57:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:57:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:57:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:57:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:57:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:57:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:57:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:57:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:57:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:57:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:57:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:57:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:57:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:57:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:58:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:58:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:58:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:58:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:58:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:58:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:58:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:58:08 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:08 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:58:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:58:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:08 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:58:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:58:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:58:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:58:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:58:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:58:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:58:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:58:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:58:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:58:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:58:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:58:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:58:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:58:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:58:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:58:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:58:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:58:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:58:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:58:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:58:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:58:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:58:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:58:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:58:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:58:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:58:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:58:46 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:58:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:58:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:58:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:58:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:58:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:58:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:58:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:58:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:58:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:58:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:58:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:58:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:58:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:58:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:58:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:58:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:58:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:58:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:58:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:58:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:59:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:59:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3622 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:59:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:59:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:59:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:59:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:59:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:59:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:59:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:59:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:59:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:59:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 11:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 11:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 11:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 11:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 11:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 11:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 11:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 11:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 11:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 11:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 11:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 11:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 11:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 11:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 11:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 11:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 11:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 11:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 11:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 11:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 11:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 11:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 11:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 11:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 11:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 11:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 11:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 11:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 11:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 11:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 11:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 11:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 11:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 11:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 11:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 11:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 11:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 11:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 11:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 11:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 11:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 11:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 11:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 11:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 11:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 11:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 11:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 11:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:59:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:59:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 11:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 11:59:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:59:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 11:59:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:59:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 11:59:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:59:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 11:59:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 11:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:59:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 11:59:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 11:59:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 11:59:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 11:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 11:59:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 11:59:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 11:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 11:59:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 11:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 11:59:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 11:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 11:59:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 11:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 11:59:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 11:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 11:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 11:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 11:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 11:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 11:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 11:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 11:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 11:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 11:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 11:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 11:59:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 11:59:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 11:59:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 11:59:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 11:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:00:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:00:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:00:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:00:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:00:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:00:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:00:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:00:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:00:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:00:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:00:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:00:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:00:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:00:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:00:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:00:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:00:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:00:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:00:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:00:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:00:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:00:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:00:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:00:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:00:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:00:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:00:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:00:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:00:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:00:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:00:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:00:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:00:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:00:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:00:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:00:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:00:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:00:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:00:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:00:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:00:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:00:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:00:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:00:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:00:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:00:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:00:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:00:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:00:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:01:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:01:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:01:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:01:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:01:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:01:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:01:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:01:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:01:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:01:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:01:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:01:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:01:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:01:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:01:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:01:45 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:01:45 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:01:46 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:01:46 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:01:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:01:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:01:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 12:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 12:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 12:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 12:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 12:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 12:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 12:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 12:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 12:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 12:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 12:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:01:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:01:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:01:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:01:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:02:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:02:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:02:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:02:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:02:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:02:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:02:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:02:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:02:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:02:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:02:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:02:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:02:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:02:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:02:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:02:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:02:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:02:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:02:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:02:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:02:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:02:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:02:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:02:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:02:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:02:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:02:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:02:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:02:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:02:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:02:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:02:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:02:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:02:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:02:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:02:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:02:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:02:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:02:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:02:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:02:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:02:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:02:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:02:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:02:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:02:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:02:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:03:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:03:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:03:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:03:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:03:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:03:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:03:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:03:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:03:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:03:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:03:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:03:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:03:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:03:22 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:03:22 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:03:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:03:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:03:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:03:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:03:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:03:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:03:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:03:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:03:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:03:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:03:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:03:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:03:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:03:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:03:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:03:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:03:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:03:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:03:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:03:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:03:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:03:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:03:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:03:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:03:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=217 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=218 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=219 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:48 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=220 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:03:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:03:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:03:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:03:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:03:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:03:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:03:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:03:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:03:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:03:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:03:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:03:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=217 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=218 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=219 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:03:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:03:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:03:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:03:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:04:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:04:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:04:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:04:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:04:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:04:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:04:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:04:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:04:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:04:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:04:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:04:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:04:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:04:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:04:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:04:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:04:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:04:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:04:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:04:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 12:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 12:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 12:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 12:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:05:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:05:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:05:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:05:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:05:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:05:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:05:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:05:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:05:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:05:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:05:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:05:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:05:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:05:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:05:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:05:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:05:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:05:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:05:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:05:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:05:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:05:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:05:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:05:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2381 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:05:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:05:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:05:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:05:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:05:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:05:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:05:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:05:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:05:46 [DEBUG] fake_trx.py:263 (MS@172.18.182.22:6700) Recv SETTA cmd
2024-10-28 12:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:05:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:05:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:05:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:05:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:05:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:05:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:06:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:06:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:06:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:06:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:06:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:06:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:06:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:06:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:06:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:06:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:06:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:06:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:06:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:06:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:06:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1561 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1561 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1561 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1561 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1561 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:06:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:06:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:06:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:06:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:06:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:06:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:06:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:06:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:06:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:06:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:06:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:06:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:06:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:06:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:06:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:06:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:06:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:06:56 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:07:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:07:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:07:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:07:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:07:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:07:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:07:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:07:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:07:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:07:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2883 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:07:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:07:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:07:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:07:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:07:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:07:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:07:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:07:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:07:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:07:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:07:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:07:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:07:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:07:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:07:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:07:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:07:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:07:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:07:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:08:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:08:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:08:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:08:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3737 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3737 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3737 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3737 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3737 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3737 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3738 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:08:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:08:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:08:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:08:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:08:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:08:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:08:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:08:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:08:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:08:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:08:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:08:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:08:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:08:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:08:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:08:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:08:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:08:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:08:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:08:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:08:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:08:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:08:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:08:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:08:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:08:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:08:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:08:34 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:08:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:08:34 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:08:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:08:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:08:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:08:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:08:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:08:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:08:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:08:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:08:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:08:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:08:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:08:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:09:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:09:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:09:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:09:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:09:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:09:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:09:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:09:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:09:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:09:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:09:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:09:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:09:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:09:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:09:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:09:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:09:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:09:21 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:09:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:09:22 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:09:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:09:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:09:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:09:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:09:33 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:09:33 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:09:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:09:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:09:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:09:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:09:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:09:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:09:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:09:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:09:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:09:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:09:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:09:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:09:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:09:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:09:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:09:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:09:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:09:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:09:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:09:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:09:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:09:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:09:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:09:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:10:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:10:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:10:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:10:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:10:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:10:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:10:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:10:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:10:19 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:10:19 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:10:19 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:10:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:10:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:10:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:10:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:10:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:10:25 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:10:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:10:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:10:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:10:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:10:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:10:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:10:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:10:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:10:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:10:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:10:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:10:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:10:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:10:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:10:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:10:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:10:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:10:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:10:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:10:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:10:44 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:10:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:10:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:10:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:10:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:10:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:10:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:10:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:10:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:10:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:10:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:10:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:10:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:10:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:10:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:10:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:10:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:10:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:10:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:10:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:10:58 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:10:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:10:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:10:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:11:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:11:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:11:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:11:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:11:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:11:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:11:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:11:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:11:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:11:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:11:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:11:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:11:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:11:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:11:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:11:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:11:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:11:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:11:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:11:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:11:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:11:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:11:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:11:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:11:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:11:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:11:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:11:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:11:25 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:11:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:11:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1865 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:11:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:11:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:11:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:11:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:11:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:11:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:11:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:11:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:11:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:11:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:11:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:11:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:11:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:11:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:11:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:11:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:11:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:11:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:11:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:11:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:11:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:11:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:11:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:11:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:11:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:11:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:11:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:00 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:12:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:12:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:12:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:12:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:12:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:12:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:12:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:12:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:12:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:12:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:12:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:12:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:12:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:12:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:12:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:12:58 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:12:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:12:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:12:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:12:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:12:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:13:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:13:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:13:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:13:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:13:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:13:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:13:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:13:09 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:13:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:13:09 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:13:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:13:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:13:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:13:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:13:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:13:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:13:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:13:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:13:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:13:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:13:32 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:13:32 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:13:33 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:13:33 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:13:40 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:13:40 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:13:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:13:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:13:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:13:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:13:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:13:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:13:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:13:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:13:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:13:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:13:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:13:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:13:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:13:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:13:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:13:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:13:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:13:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:13:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:13:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:13:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:13:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:13:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:13:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:14:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:14:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1424 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1424 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:03 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1425 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:14:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:14:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:14:08 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:14:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:14:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:14:08 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:14:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:14:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:14:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:14:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:14:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:14:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:14:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:14:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:14:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:14:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:14:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:14:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:14:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:14:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:14:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:14:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:14:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:14:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:14:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:14:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:14:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:14:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:14:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:14:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:14:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:14:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:14:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:14:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:14:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:14:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:14:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:14:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:14:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:14:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:14:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:14:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:14:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:14:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:14:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:14:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:14:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:00 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:15:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:15:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:15:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:15:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:15:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:15:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:15:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:15:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:15:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:15:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:15:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:15:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:15:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:15:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:15:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:15:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1870 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:15:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:15:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:15:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:15:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:15:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:15:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:15:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:15:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:15:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:15:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:15:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:15:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:15:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1868 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:16:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:16:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:16:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:16:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:16:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:16:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:16:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:16:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:16:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:16:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:16:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:16:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:16:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:16:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:16:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:16:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:16:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:16:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:16:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:16:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:16:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:16:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:16:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:35 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:16:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:16:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:16:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:16:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:16:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:16:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:16:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:16:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:16:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:16:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:16:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:16:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:16:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:16:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:16:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:16:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=163 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=163 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:16:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:17:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:17:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:17:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:17:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:17:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:17:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:17:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:17:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:17:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:17:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:17:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:17:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:17:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:17:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:17:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:17:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:17:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:17:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:17:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:17:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:17:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:17:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:17:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:17:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:17:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:17:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:17:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:17:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:17:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:17:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:17:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:17:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:17:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:17:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:17:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:17:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:17:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:17:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:17:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:17:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:17:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:17:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:17:44 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:17:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:17:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:17:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:17:52 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:52 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:52 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:52 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:52 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:52 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:17:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:17:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:17:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:17:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:17:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:17:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:17:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:17:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:17:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:17:58 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:17:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:17:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:17:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:17:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:17:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:17:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:18:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:18:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:18:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:18:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:18:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:18:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:18:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:18:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:18:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:18:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=567 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:18:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:18:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:18:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:18:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:18:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:18:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:18:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:18:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:18:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:18:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:18:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:18:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:19:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:19:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:19:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:19:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:19:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:19:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:19:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:19:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:19:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:19:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:19:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=975 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=975 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=976 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:19:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=777 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:19:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:19:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:19:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:19:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:19:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:19:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:19:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:19:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:19:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:19:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:19:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:19:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:19:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:23 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:20:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:20:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:20:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:20:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:20:56 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:20:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:20:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:20:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:21:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:21:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:21:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:21:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:21:02 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 12:21:02 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 200
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:03 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 12:21:03 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 0
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:21:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:21:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:21:09 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:21:09 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:21:09 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 12:21:09 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 200
2024-10-28 12:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 12:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:21:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 12:21:11 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 0
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:21:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:21:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:21:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:21:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:21:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:21:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:21:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:21:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:21:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:21:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:21:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:21:22 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:22 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:21:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:21:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:21:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:21:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:21:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:21:51 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:21:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:21:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:22:04 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:22:05 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:22:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:22:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:22:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:22:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:22:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:22:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:22:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:22:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:22:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:22:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:22:34 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:22:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:22:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:22:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:22:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:22:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:22:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:22:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:22:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:22:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:22:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:22:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:22:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:22:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1735 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1735 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1735 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1735 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1735 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1735 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:22:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:23:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:23:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:23:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:00 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:23:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:23:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:23:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:23:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:23:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:23:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:23:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:23:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:23:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:23:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4270 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4270 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:23:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:23:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:23:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:23:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:23:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:23:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:23:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:23:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:23:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:23:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:23:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:23:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:23:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:23:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:23:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:08 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1736 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:24:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:24:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:24:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:24:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:24:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:24:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:24:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:25:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:25:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:25:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:25:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:25:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:25:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:25:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:25:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:25:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:25:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:25:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:36 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:25:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:25:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:25:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:25:58 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:25:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:25:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:25:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:26:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:26:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:26:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:26:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:26:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:26:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:26:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:26:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:26:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:26:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:26:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:26:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:26:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:26:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:26:25 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:26:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:26:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:26:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5229 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:26:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:26:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:26:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:26:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:26:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:26:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:26:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:26:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:26:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:26:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:26:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:26:45 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:26:51 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:26:52 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:27:02 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:27:02 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:27:05 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:27:07 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:27:08 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:27:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:27:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:27:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:27:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:27:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:27:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:27:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:27:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:27:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:27:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:27:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:27:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:27:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:27:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:27:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:27:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:27:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:27:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:27:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:27:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:27:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:27:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:27:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:27:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:27:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:27:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:27:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:27:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:27:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:27:42 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:27:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:42 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:27:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:27:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:27:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:27:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:27:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:27:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:27:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:27:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:27:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:27:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:27:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:27:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:27:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:27:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:27:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:27:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:27:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:27:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:27:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:27:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:27:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:27:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:27:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:27:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:27:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:27:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:27:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:27:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:27:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:27:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:27:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:27:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:27:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:27:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:27:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:27:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:27:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:27:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:27:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:27:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:28:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:28:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:00 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:28:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:28:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:01 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:28:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:28:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:28:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:28:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:28:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:28:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:28:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:28:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:28:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:28:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:28:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:28:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:28:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:28:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:28:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:28:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:28:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:28:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:28:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:28:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:28:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:28:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:28:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6719 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:28:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:28:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:28:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:28:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:28:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:28:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:28:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:28:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:28:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:28:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:28:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:28:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:28:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:28:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:28:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:28:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:28:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:28:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:28:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:28:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:28:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:28:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:28:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:28:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:28:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:28:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:28:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:28:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:28:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:28:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:29:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=590 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:29:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:23 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=318 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=310 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=310 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=310 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=310 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=310 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:36 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:29:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:29:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:29:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:29:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:29:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:29:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:29:56 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:29:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:56 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:29:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:29:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:29:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:29:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:29:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:30:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:30:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:30:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:30:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:30:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:30:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:30:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:30:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:30:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:30:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:30:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:30:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:30:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:30:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:30:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:30:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:30:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:30:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:30:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:30:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:30:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:30:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:30:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:30:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:30:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:30:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:30:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:30:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:30:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:30:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:30:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:30:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:30:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:30:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:30:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:30:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:30:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:30:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:30:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:30:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:30:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:30:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:30:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:30:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:30:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:30:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:30:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:30:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:30:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:30:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:30:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:30:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:30:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:30:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:30:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:30:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:30:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:30:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:30:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:30:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:30:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:30:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:30:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:30:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:30:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:31:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:31:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:31:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:31:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:31:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:31:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:31:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:31:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:31:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:31:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:31:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:31:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:31:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:31:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:31:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:31:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:31:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:31:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:31:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:31:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:31:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:31:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:31:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:31:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:31:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:31:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:31:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:31:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2484 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:31:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:31:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:31:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:31:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:31:37 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:31:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:31:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:31:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:31:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:31:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:31:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:31:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:31:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:31:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:31:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:31:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:31:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:31:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:31:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:31:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:31:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:31:58 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:31:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:31:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:31:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:31:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:32:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:32:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:32:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:32:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:32:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:32:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:32:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:32:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:32:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:32:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:32:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:32:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:32:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:32:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:32:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:32:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:32:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:32:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:32:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:32:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:32:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:32:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:32:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:32:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:32:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:32:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:32:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:32:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:32:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:32:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:32:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:32:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:32:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:32:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:32:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:32:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:32:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:32:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:32:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:32:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:32:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:32:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:33:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:33:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:33:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:33:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:33:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:33:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:33:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:33:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:33:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:33:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:33:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:33:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:33:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:33:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:33:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:33:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:33:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:33:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:33:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:33:37 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:33:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:33:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:33:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:33:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:33:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:33:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1863 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:33:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:33:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:33:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:33:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:33:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:33:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:33:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:33:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:33:56 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:33:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:33:56 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:33:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:33:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:33:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:33:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:33:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:34:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:34:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:34:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:34:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:34:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:34:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:34:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:34:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:34:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:34:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:34:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:34:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:34:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:34:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:34:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:34:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:34:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:34:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2517 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2517 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:34:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:34:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:34:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:34:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:34:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:34:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:34:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:34:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:34:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:34:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:34:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:34:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:34:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:34:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4474 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:35:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:35:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:35:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:35:09 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:35:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:35:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:35:09 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:35:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:35:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:35:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:35:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:35:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:35:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:35:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:35:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:35:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:35:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:35:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:35:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:35:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:35:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:35:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:35:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:35:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:35:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:35:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:35:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:35:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:35:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:35:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:35:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:35:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:35:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:36:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:36:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:36:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:36:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:36:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:36:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:36:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:36:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:36:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:36:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:36:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:36:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:36:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:36:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:36:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:36:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:36:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:36:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:36:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:36:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:36:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:36:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:36:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:36:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:36:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:36:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:36:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:36:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:36:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:36:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:36:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:36:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:36:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:36:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:36:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:36:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:37:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:37:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:37:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:37:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:37:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:37:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:37:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:37:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:37:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:37:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:37:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:37:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:37:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:37:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:37:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:37:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:37:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:37:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:37:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:37:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:37:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:37:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:37:50 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:37:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:37:50 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:37:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:37:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:37:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:37:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:37:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:37:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:37:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:38:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:38:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:38:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:38:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:38:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:38:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:38:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:38:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:38:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:38:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:38:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:38:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:38:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:38:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:38:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:38:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:38:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:38:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:38:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:38:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:38:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:38:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:38:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:38:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:38:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:38:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:38:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:38:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:38:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:38:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:38:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:38:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:38:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:38:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:38:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:38:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:38:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:38:53 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:38:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:38:53 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:38:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:38:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:38:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:38:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:39:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:39:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:39:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:39:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:39:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:39:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:39:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:39:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:39:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:39:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:39:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:39:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:39:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:39:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:39:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:39:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:39:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:39:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:39:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:39:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:39:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:39:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:39:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:39:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:39:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:39:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:39:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:39:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:39:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:39:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:39:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:39:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:39:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:39:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=378 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:39:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:39:55 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=378 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:40:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:40:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:40:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:40:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:40:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:40:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:40:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:00 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:40:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:40:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:40:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:40:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:40:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:40:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:40:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:40:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:40:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:40:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:40:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:40:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:40:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:40:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:40:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:40:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:40:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:40:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:40:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:40:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:40:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:40:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:40:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:40:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:40:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:40:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:40:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:40:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:40:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:40:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:40:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:40:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:40:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:40:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:40:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:41:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:41:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:41:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:41:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:41:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:41:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:41:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:41:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:41:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:41:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:41:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:41:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:41:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:41:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:41:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:41:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:41:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:41:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:41:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:41:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:41:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:41:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:41:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:41:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:41:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:41:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:41:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:41:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:41:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:41:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:41:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:41:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:41:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:41:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:41:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:44 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:41:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:41:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:41:46 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=633 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:46 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=633 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:41:46 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=633 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:41:46 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=633 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:41:46 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=633 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:41:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:41:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:41:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:41:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:41:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:41:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:41:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:41:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:41:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:41:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:41:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:41:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:41:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:41:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:41:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:41:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:41:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:41:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:41:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:42:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:42:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 12:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 12:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:42:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:42:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 12:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 12:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 12:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 12:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 12:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 12:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 12:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 12:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 12:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 12:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 12:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 12:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 12:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 12:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 12:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 12:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 12:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 12:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 12:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 12:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 12:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 12:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 12:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 12:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 12:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 12:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 12:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 12:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 12:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 12:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 12:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 12:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 12:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 12:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 12:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 12:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 12:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 12:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 12:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 12:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 12:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:43:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:43:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:43:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:43:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:43:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:43:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:43:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:43:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:43:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:43:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:43:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:43:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:43:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:43:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:43:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:43:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:43:23 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:43:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:43:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:43:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:43:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:43:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:43:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:43:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:43:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:43:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:43:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:43:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:43:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:43:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:43:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:43:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:43:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:44:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:44:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:44:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:44:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:44:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:44:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:44:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:44:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:44:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:44:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:44:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:44:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:44:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:44:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:44:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:44:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:44:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:44:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:44:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:44:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:44:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:44:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:44:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:44:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:44:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:44:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:44:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:44:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:45:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:45:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:45:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:45:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:45:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:45:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:45:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:45:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:45:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:45:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:45:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:45:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:45:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:45:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:45:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:45:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:45:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:45:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:45:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:45:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:45:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:45:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:45:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:45:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:45:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:45:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:45:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:45:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:45:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:45:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:45:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:45:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:45:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:45:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:45:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:45:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 12:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 12:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 12:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 12:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 12:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 12:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 12:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 12:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 12:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 12:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 12:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 12:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 12:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 12:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 12:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:46:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 12:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 12:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 12:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 12:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 12:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 12:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 12:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 12:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 12:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 12:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 12:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 12:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 12:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 12:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 12:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 12:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 12:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 12:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 12:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 12:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 12:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 12:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 12:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 12:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 12:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 12:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 12:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 12:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 12:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 12:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 12:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 12:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 12:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 12:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 12:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 12:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 12:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 12:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 12:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-28 12:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-28 12:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-28 12:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-28 12:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-28 12:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-28 12:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-28 12:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-28 12:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-28 12:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-28 12:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-28 12:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-28 12:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-28 12:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-28 12:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-28 12:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-28 12:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-28 12:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-28 12:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-28 12:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-28 12:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-28 12:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-28 12:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-28 12:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-28 12:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-28 12:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-28 12:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-28 12:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-28 12:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-28 12:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-28 12:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-28 12:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-28 12:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-28 12:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-28 12:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-28 12:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:46:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:46:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:46:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:46:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-28 12:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-28 12:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-28 12:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-28 12:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-28 12:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-28 12:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-28 12:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-28 12:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-28 12:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-28 12:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-28 12:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-28 12:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-28 12:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-28 12:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-28 12:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-28 12:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-28 12:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-28 12:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-28 12:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-28 12:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-28 12:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-28 12:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-28 12:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-28 12:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-28 12:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-28 12:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-28 12:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-28 12:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-28 12:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-28 12:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-28 12:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-28 12:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-28 12:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-28 12:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 25704
2024-10-28 12:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 25806
2024-10-28 12:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 25908
2024-10-28 12:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 26010
2024-10-28 12:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 26112
2024-10-28 12:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 26214
2024-10-28 12:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 26316
2024-10-28 12:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 26418
2024-10-28 12:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 26520
2024-10-28 12:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 26622
2024-10-28 12:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 26724
2024-10-28 12:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 26826
2024-10-28 12:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 26928
2024-10-28 12:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 27030
2024-10-28 12:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 27132
2024-10-28 12:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 27234
2024-10-28 12:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 27336
2024-10-28 12:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 27438
2024-10-28 12:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 27540
2024-10-28 12:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 27642
2024-10-28 12:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 27744
2024-10-28 12:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 27846
2024-10-28 12:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 27948
2024-10-28 12:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 28050
2024-10-28 12:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 28152
2024-10-28 12:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 28254
2024-10-28 12:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 28356
2024-10-28 12:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 28458
2024-10-28 12:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 28560
2024-10-28 12:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 28662
2024-10-28 12:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 28764
2024-10-28 12:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 28866
2024-10-28 12:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 28968
2024-10-28 12:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 29070
2024-10-28 12:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 29172
2024-10-28 12:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 29274
2024-10-28 12:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 29376
2024-10-28 12:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 29478
2024-10-28 12:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 29580
2024-10-28 12:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 29682
2024-10-28 12:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 29784
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:47:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:47:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:47:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:47:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:47:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:47:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:47:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:47:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:47:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:47:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:47:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:47:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:47:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:47:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:47:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:47:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:47:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:47:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:47:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:47:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:47:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:47:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:47:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:47:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:47:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:47:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:47:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:47:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:47:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:47:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:47:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:47:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:47:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:47:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:47:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:47:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:47:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:47:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:47:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:47:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:47:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:47:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:47:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:47:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:47:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:47:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:48:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:48:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:48:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:48:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:48:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:48:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:48:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:48:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:48:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:48:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:48:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:48:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:48:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:48:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:48:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:48:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:48:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:49:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:49:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:49:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:49:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:49:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:49:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:49:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:49:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:49:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:49:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:49:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:49:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:49:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:49:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:49:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:49:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:49:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:49:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:49:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:49:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:49:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:49:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:49:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:49:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:49:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:49:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:49:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:49:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:49:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:49:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:49:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:49:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:49:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:49:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:49:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:49:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:49:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:49:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:49:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:49:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:49:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:49:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:49:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:49:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:49:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:49:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:49:53 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:49:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:53 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:49:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:49:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:49:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:49:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:49:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:49:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:49:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:49:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:49:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:50:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:50:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:50:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:50:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:50:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:50:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:50:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:50:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:50:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:50:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:50:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:50:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:50:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:50:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:50:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:50:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:50:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:50:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:50:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:50:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:50:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:50:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:50:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:50:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:50:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:50:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:50:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:50:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:50:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:50:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:50:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:50:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:50:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:50:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:50:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:50:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:50:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:50:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:50:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:50:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:50:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:50:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=421 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:34 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:34 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=414 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=415 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:51:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:51:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:51:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:51:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:51:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:51:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:51:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:51:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:51:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:51:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:51:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:51:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=154 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:52:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=154 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:52:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=154 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:52:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=154 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:52:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=154 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:52:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=154 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:24 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:24 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:52:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:52:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:52:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:52:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:44 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:52:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:52:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:52:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:52:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:52:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:52:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:52:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:52:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:52:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:52:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:52:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:52:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:52:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:52:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:52:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:52:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:52:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:52:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:52:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:53:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:53:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:53:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:53:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:53:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:53:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:53:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:53:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:53:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:53:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:53:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:53:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:53:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:53:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:53:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:53:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:53:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:53:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:53:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:53:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:53:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:53:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:53:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:53:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:53:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:53:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:53:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:53:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:53:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:53:43 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.182.20:5700'
2024-10-28 12:53:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.182.20:5802)
2024-10-28 12:53:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.182.20:5801)
2024-10-28 12:53:43 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.182.22:6700'
2024-10-28 12:53:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.182.22:6802)
2024-10-28 12:53:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.182.22:6801)
2024-10-28 12:53:43 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.182.20:5700/1'
2024-10-28 12:53:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.182.20:5804)
2024-10-28 12:53:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.182.20:5803)
2024-10-28 12:53:43 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.182.20:5700/2'
2024-10-28 12:53:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.182.20:5806)
2024-10-28 12:53:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.182.20:5805)
2024-10-28 12:53:43 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.182.20:5700/3'
2024-10-28 12:53:43 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.182.20:5808)
2024-10-28 12:53:43 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.182.20:5807)
2024-10-28 12:53:43 [INFO] fake_trx.py:423 Init complete
2024-10-28 12:53:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:53:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:53:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:53:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:53:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:53:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:54:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:54:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:54:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:54:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:54:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 0 -> 1
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:54:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 0 -> 1
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:54:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 0 -> 1
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:54:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 0 -> 1
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:54:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:54:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:54:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:54:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:23 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.182.20:5700'
2024-10-28 12:55:23 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.182.20:5802)
2024-10-28 12:55:23 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.182.20:5801)
2024-10-28 12:55:23 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.182.22:6700'
2024-10-28 12:55:23 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.182.22:6802)
2024-10-28 12:55:23 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.182.22:6801)
2024-10-28 12:55:23 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.182.20:5700/1'
2024-10-28 12:55:23 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.182.20:5804)
2024-10-28 12:55:23 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.182.20:5803)
2024-10-28 12:55:23 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.182.20:5700/2'
2024-10-28 12:55:23 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.182.20:5806)
2024-10-28 12:55:23 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.182.20:5805)
2024-10-28 12:55:23 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.182.20:5700/3'
2024-10-28 12:55:23 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.182.20:5808)
2024-10-28 12:55:23 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.182.20:5807)
2024-10-28 12:55:23 [INFO] fake_trx.py:423 Init complete
2024-10-28 12:55:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 0 -> 1
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 0 -> 1
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 0 -> 1
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 0 -> 1
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:55:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:55:28 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:55:28 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:33 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:38 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:38 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:39 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:39 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:39 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:39 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:39 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:55:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:55:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:41 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2753 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:55:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:55:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:55:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
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2024-10-28 12:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
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2024-10-28 12:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
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2024-10-28 12:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
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2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
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2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:55:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:55:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:55:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:55:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:55:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:55:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:55:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:55:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:55:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:55:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:56:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:56:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:56:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:56:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:56:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:56:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:56:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:56:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:56:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:56:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:56:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:56:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:56:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:56:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:56:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:56:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:56:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:56:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:56:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:56:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:56:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:56:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:56:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:56:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:56:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:56:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:56:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:56:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:56:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:56:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:56:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:56:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:56:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:56:30 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:56:30 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:56:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:56:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:42 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:56:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:56:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:56:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:56:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:01 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:01 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:57:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:06 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:06 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:10 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:10 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 12:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 12:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 12:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 12:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 12:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 12:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 12:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 12:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 12:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 12:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 12:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 12:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 12:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 12:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:19 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:19 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 12:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 12:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 12:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 12:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 12:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 12:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 12:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 12:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 12:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 12:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 12:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 12:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 12:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 12:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 12:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 12:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:27 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:27 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 12:57:28 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 12:57:28 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 12:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 12:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 12:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 12:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 12:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 12:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 12:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 12:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 12:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 12:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 12:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 12:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 12:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 12:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-28 12:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-28 12:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-28 12:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-28 12:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-28 12:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-28 12:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-28 12:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-28 12:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:57:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:57:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:57:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19534 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:57:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:57:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19534 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:57:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19534 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:57:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=19534 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:57:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:57:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:57:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:57:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:57:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:57:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:57:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:57:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:57:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:57:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:57:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:57:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:57:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:57:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:57:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:57:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:57:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:57:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:57:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:57:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:52 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:53 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:53 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:53 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:58 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:58 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:58 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:58 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:58 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:58 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:59 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:59 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:59 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:57:59 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:00 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:58:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:58:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:58:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:58:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:58:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:58:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:58:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:58:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:58:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:12 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:58:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:15 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:20 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:21 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:21 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:24 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:24 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:26 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:27 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:27 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:29 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:29 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:30 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:30 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:58:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:58:33 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:34 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:58:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:58:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 12:58:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:58:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 12:58:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:58:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 12:58:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:58:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 12:58:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:58:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 12:58:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 12:58:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 12:58:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 12:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 12:58:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 12:58:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 12:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 12:58:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 12:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 12:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 12:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 12:58:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 12:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 12:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 12:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 12:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 12:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 12:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 12:58:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 12:58:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 12:58:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 12:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 12:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 12:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 12:58:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 12:58:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 12:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 12:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 12:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 12:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 12:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 12:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 12:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 12:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 12:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 12:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 12:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:58:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:58:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 12:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 12:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 12:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 12:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 12:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 12:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 12:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 12:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 12:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:01 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 12:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 12:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 12:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 12:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 12:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 12:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 12:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 12:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:05 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:05 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 12:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 12:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 12:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 12:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 12:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 12:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 12:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 12:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:09 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 12:59:10 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 12:59:10 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 12:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 12:59:11 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 12:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 12:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 12:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 12:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 12:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 12:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 12:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 12:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 12:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 12:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 12:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 12:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 12:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 12:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 12:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 12:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 12:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 12:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 12:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 12:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 12:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 12:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 12:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 12:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 12:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 12:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 12:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 12:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 12:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:27 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:27 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 12:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 12:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 12:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 12:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 12:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 12:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 12:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 12:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 12:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 12:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 12:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 12:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 12:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 12:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 12:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 12:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:35 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:35 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 12:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 12:59:36 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 12:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 12:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 12:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 12:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 12:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 12:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:39 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:39 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 12:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 12:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 12:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 12:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 12:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 12:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 12:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 12:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:43 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:44 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 12:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 12:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 12:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 12:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 12:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 12:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 12:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 12:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:48 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:48 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 12:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 12:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 12:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 12:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 12:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 12:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 12:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:52 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:52 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 12:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 12:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 12:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 12:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 12:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 12:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 12:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 12:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 12:59:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 12:59:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 12:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 12:59:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 12:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 12:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 12:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 12:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 12:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 12:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 12:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 13:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:00 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:00:00 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 13:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 13:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 13:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 13:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 13:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 13:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 13:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:04 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:00:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:00:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:00:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=18562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:00:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:00:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=18562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:00:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=18562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:00:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=18562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:00:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=18562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:00:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:00:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:00:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:00:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:00:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:00:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:00:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:00:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:00:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:00:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:00:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:00:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:00:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:00:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:00:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:00:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:00:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:00:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:00:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:00:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:00:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:00:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:00:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:00:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:00:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:00:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:00:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:00:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:00:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:00:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:00:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:00:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:41 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:00:41 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:46 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:00:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:00:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 13:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 13:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:01 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 13:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 13:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 13:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 13:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 13:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 13:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 13:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 13:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 13:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:05 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:05 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 13:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 13:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 13:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 13:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 13:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 13:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 13:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 13:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 13:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 13:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:10 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:10 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 13:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 13:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 13:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 13:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 13:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 13:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 13:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 13:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 13:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 13:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 13:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 13:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 13:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 13:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 13:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:19 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:19 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 13:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 13:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 13:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 13:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 13:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 13:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 13:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 13:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 13:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 13:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 13:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 13:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 13:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 13:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 13:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 13:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:27 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:27 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 13:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 13:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 13:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 13:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 13:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 13:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 13:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 13:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 13:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 13:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 13:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 13:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 13:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 13:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 13:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 13:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 13:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 13:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 13:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 13:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 13:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 13:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 13:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 13:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:01:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-28 13:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-28 13:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-28 13:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-28 13:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-28 13:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-28 13:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-28 13:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-28 13:01:44 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:44 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:01:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:01:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:01:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:01:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:01:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:01:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:01:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:01:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:01:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:01:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:01:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:01:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:01:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:01:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:01:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:01:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:01:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:01:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:01:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:01:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:01:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:01:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:01:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:01:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:01:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:01:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:01:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:01:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:01:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:01:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:01:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:01:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:01:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:01 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:02 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:02 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:03 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:06 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:07 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:07 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:08 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:08 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:09 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:09 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:11 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:11 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:12 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:12 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:15 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:15 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:02:15 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:16 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:16 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:18 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:18 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:19 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:02:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:02:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:02:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:02:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:02:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:02:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:02:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:02:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:02:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:02:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:02:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:02:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:02:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:02:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:02:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:25 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:02:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:02:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:02:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:02:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:02:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:40 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:02:41 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:02:42 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:02:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:47 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:50 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:02:50 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:02:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:54 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:02:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:02:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:02:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:02:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:02:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:02:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:02:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:02:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:02:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:02:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:02:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:02:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:02:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:03:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:03:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:03:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:03:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:03:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:03:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:12 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:15 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:15 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:19 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:19 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:03:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:24 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:03:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:35 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:03:36 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:03:36 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:03:37 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:38 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:38 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:42 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:42 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 13:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 13:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:45 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:03:45 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 13:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:46 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:03:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:03:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:03:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:03:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:03:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:03:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:03:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:03:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:03:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:03:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:03:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:03:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:03:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:03:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:03:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:03:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:03:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:03:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:03:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:03:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:03:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:03:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:03:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:03:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:03:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:03:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:03:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:04:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2015 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:04:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:04:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:04:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:04:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:04:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:04:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:04:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:04:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2020 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2020 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2020 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:04:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:04:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:04:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:04:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:04:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2904 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:04:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:04:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:04:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:04:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:04:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:04:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:04:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:04:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:04:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:04:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:04:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:04:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:04:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:04:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:04:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:04:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:04:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:04:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:04:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:04:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:04:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:04:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:04:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:04:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:04:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:04:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:04:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:04:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:04:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=862 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:05:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:05:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:05:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:05:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:05:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:05:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:05:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:05:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:05:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:05:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:05:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:05:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:05:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:05:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:05:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:05:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:05:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:05:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:05:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:05:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:05:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:05:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:05:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:05:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1298 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1298 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1298 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1298 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1298 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1298 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:05:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:05:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:05:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:05:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:05:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:05:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:05:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:05:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:05:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:05:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:05:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1199 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1199 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1199 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1200 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1201 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:05:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:05:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:05:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:05:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:05:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:05:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:05:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:05:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:05:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:05:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:05:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:05:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:05:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:05:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:05:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:05:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:05:55 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:05:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:05:56 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:05:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:05:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:05:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:05:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:06:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:06:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:06:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:06:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:06:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:06:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:06:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:06:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:06:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:06:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:06:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:06:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:06:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:06:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:06:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:06:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:06:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:06:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:06:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:06:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:06:30 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:06:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:06:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:06:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:06:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:37 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:06:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:06:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:06:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:06:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:44 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:06:44 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:45 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:06:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:06:50 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:50 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:50 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:06:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:06:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:06:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:06:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:06:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:06:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:06:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:06:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:06:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:06:58 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:06:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:06:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:06:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:06:59 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:06:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:06:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:06:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:07:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:07:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:07:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:07:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:07:05 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:06 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:07:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:07:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:07:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:07:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:07:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:07:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:07:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:07:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:07:22 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:07:22 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:07:23 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:07:23 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:07:24 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:07:24 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:07:25 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:07:25 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:28 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:07:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:07:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:07:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:07:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=7131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:07:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:07:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:07:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:07:49 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:07:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:07:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:07:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:52 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:07:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:07:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:07:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:07:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:07:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:07:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:07:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:07:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:07:59 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:07:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:07:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:07:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=352 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:08:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:08:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:08:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:08:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:08:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:08:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:08:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:08:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1867 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:08:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:08:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:08:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:08:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:08:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:08:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:08:18 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:08:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:08:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:08:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:08:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:08:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:08:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:08:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:08:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:08:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:08:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:08:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:08:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:08:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:08:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:08:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:08:44 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:08:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:08:44 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:08:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:08:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:08:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:08:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:08:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:08:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:08:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:08:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:08:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:08:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:08:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:08:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:08:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:08:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:08:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:08:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:08:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:08:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:09:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:09:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:09:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:09:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:09:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:09:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:09:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:09:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:09:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:09:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:09:14 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:09:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:09:15 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:09:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:09:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:09:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:09:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:09:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4470 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:09:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:09:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:09:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:09:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:09:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:09:24 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:09:24 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:09:24 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:09:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:09:24 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:09:24 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=219 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:09:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:09:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:09:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=405 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:09:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:09:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:09:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:09:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:09:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:09:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:09:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:09:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:09:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:09:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:09:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=126 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-28 13:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:09:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:09:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:09:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:09:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:09:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:09:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:09:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:09:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:09:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:09:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:09:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:09:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:09:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:09:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:09:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:09:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:09:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:09:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:09:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:09:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:09:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:09:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:09:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:09:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:10:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:10:09 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:10:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:10:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:10:09 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:10:11 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:10:11 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:10:12 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:10:12 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:10:12 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:10:13 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:10:13 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:10:14 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:10:14 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:10:22 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:10:22 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:10:23 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 13:10:23 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 13:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 13:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:10:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:10:24 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:10:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:10:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 13:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 13:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 13:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 13:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 13:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 13:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 13:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 13:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 13:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 13:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 13:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 13:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 13:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 13:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 13:10:32 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 13:10:32 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 13:10:33 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 13:10:33 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 13:10:34 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 13:10:34 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 13:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 13:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 13:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 13:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 13:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 13:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 13:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 13:10:38 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 13:10:38 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 13:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 13:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:10:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:10:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:10:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:10:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:10:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:10:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:10:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:10:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:10:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:10:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:10:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:10:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:10:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:10:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:10:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:10:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:10:50 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:10:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:10:50 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:10:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:10:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:10:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:10:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:10:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:10:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:10:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:10:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:10:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:10:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:10:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:11:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:11:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:11:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2384 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:11:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2384 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:11:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2384 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:11:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2384 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:11:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:11:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:11:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:11:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:11:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:11:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:11:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:11:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:11:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:11:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:11:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:11:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:11:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:11:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:11:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:11:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:11:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:11:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:11:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:11:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:11:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:11:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:11:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:11:22 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:22 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:11:22 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:11:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:11:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:11:23 [DEBUG] fake_trx.py:263 (MS@172.18.182.22:6700) Recv SETTA cmd
2024-10-28 13:11:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:11:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:11:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:11:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:11:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:11:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:11:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:11:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:11:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:11:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:11:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:11:40 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:11:41 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:11:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:11:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:11:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:11:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:11:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:11:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:11:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:11:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:11:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:11:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:11:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:11:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:11:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:11:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:11:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:11:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:11:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:11:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:11:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:11:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:11:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:11:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:11:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:11:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:11:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:11:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:11:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:11:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:11:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:11:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:12:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:12:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:12:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:12:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:12:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:12:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:12:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:12:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:12:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:12:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:12:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:12:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:12:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:12:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:12:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:12:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:12:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:12:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:12:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:12:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:12:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:12:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:12:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:12:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2294 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:12:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:12:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:12:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:12:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:12:33 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:33 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:12:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:12:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:12:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:12:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:39 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:39 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=210 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:12:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:12:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:12:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:12:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:12:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:12:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:12:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:12:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:12:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:12:48 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:12:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:51 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:12:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:12:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:12:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:12:58 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:12:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:12:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:13:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:13:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:13:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:13:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:13:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:13:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:13:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:13:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:13:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:13:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:13:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:13:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:13:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:13:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:13:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:13:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:13:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:13:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:13:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:13:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:13:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:13:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:13:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:13:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:13:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:13:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:13:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:13:23 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:13:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:13:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:13:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:13:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:13:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:13:25 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:13:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:13:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:13:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:13:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:13:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:13:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:13:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:13:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:13:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:13:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:13:40 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:13:40 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:13:45 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:13:45 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:13:47 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:13:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:13:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:13:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:13:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:13:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:13:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:13:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:13:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:13:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:13:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:13:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:13:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:13:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:13:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:13:53 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:13:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:13:53 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:13:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:13:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:13:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:13:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:13:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:14:10 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:14:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:14:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:14:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:14:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:14:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4789 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4789 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4789 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4789 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4789 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:14 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4789 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:14:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:14:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:14:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:14:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:14:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:14:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:14:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:14:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:14:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:14:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:14:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:14:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:14:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:14:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:14:36 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:14:37 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:14:38 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:14:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:14:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4787 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:14:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:14:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:14:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:14:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:14:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:14:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:14:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:14:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:14:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:14:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:14:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:14:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:14:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:14:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:14:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:14:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:14:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:14:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:14:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:14:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:14:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:14:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:14:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:14:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:14:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:14:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:14:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:15:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:15:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:15:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:15:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:15:02 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:15:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:15:12 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:15:13 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:15:18 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:15:19 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:15:20 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:15:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:15:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:15:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:15:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:15:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:15:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:15:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:15:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:15:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:15:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:15:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:15:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:15:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:15:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:15:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:15:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:15:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:15:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:15:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:15:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:15:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:15:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:15:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:15:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:15:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:15:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:15:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:15:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:15:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:15:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:15:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:15:50 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:15:50 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:15:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:15:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:15:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:15:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:15:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:15:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:15:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:15:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:15:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:15:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:15:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:15:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:15:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:15:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:15:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:15:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:15:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:15:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:15:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:15:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:15:59 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:16:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:16:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:16:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:16:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:16:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:16:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:16:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:16:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:16:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:16:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:16:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:16:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:16:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:16:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:16:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:16:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:16:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:16:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:16:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:16:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:16:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:16:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:16:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:16:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:16:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:16:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:16:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:16:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:16:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:16:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:16:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:16:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:16:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:16:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:16:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:16:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:16:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:16:37 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1866 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:16:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:16:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:16:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:16:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:16:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:16:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:16:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:16:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:16:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:16:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:16:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:16:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:16:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:16:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:16:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:16:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:16:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:16:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:16:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:16:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:16:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:16:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:16:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:16:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:16:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:16:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:16:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:16:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:16:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:16:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:16:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:17:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:17:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:17:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:17:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:17:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:17:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:17:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:17:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:17:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:17:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:17:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:17:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:17:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:17:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:17:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:17:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:17:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:18 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:17:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:17:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:17:24 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:17:24 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:17:24 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:17:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:17:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:17:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:17:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:17:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:17:35 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:17:36 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:17:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:17:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:17:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:17:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:17:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:17:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:17:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:17:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:17:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:17:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:17:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:17:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:17:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:17:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:17:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:17:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:18:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:18:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:18:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:18:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:18:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3606 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:32 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:18:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:49 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:18:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:18:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:18:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:18:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:18:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:18:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:18:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:18:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:19:18 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:19:19 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:19:19 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:19:20 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:19:21 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:19:21 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:19:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:19:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:19:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:19:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:19:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:19:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:19:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:19:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:19:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:19:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:19:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:19:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:19:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:19:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:19:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:19:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:19:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:19:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:19:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:19:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:19:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:19:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:19:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:19:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:19:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:19:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:19:36 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:19:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:19:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:19:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:19:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:19:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:19:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:19:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:19:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:19:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:19:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:19:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:19:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:19:42 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:19:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:19:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:19:42 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:19:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:19:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:19:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:19:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:19:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:19:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:19:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:19:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:19:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:19:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:19:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:19:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:19:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:19:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:19:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:19:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:19:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:19:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:19:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:19:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:19:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:19:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:19:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:19:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:19:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:20:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:20:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:20:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:20:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:20:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:20:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:20:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:20:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:20:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:20:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:20:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:20:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:20:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:20:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:20:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:20:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:40 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:20:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:20:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:20:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:20:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:20:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:20:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:20:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:20:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:20:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:20:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:20:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:20:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:20:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:20:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:20:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:20:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:20:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:20:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:21:00 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:00 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:21:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:21:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:21:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:21:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:21:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:21:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:21:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:21:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:21:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:21:08 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:09 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=923 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=923 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:09 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:21:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:21:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:21:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:21:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:21:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:21:18 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1869 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:21:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:21:28 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:21:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:28 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:21:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:21:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:21:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:21:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:21:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:21:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:21:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:21:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:21:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:21:42 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:21:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:42 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:21:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:21:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:21:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:21:45 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:21:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:21:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:21:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:21:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:50 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:21:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:21:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:21:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:21:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:21:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:21:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:21:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:21:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:21:56 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:21:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:21:56 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:21:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:21:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:21:56 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:21:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:21:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:21:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:21:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:21:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:21:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:22:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:01 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1214 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:22:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:22:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:22:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:22:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:22:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:22:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:22:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:22:09 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:11 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:22:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:22:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:22:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:22:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:22:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:22:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:22:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:22:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:22:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:22:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:25 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:22:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:22:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:22:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:22:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:22:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:22:34 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:22:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:34 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:22:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:22:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:22:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:22:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:22:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:22:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:22:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:22:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:22:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:22:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:22:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:22:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:22:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:22:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:22:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:22:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:22:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:22:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:22:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2014 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2014 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2014 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2014 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:54 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2014 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:22:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:22:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:22:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:22:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:23:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:23:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:23:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:23:00 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:23:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:23:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:23:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:23:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:23:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:23:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:23:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:23:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:23:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:23:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:23:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:23:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:23:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:23:17 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:23:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:23:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:23:18 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:23:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:23:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:23:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:23:24 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:23:24 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:24 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:23:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:23:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:23:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:23:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:23:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:23:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:23:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:23:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:23:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:23:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:23:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:23:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:23:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:23:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:23:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:23:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:23:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:23:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:23:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:23:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:23:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:23:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:23:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1861 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:23:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:23:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:23:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:23:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:23:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:23:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:23:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:23:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:23:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:23:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:23:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:23:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:23:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:23:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:24:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:12 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:25 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:25 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:25 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:24:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:24:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:24:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:24:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:24:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:24:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:43 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:24:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:24:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:24:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:51 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:24:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:24:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:24:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:24:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:24:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:24:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:24:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:24:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:24:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:24:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:24:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:24:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:00 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:25:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:25:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:25:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=552 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=552 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:17 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=552 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:22 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:22 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:25:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=779 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=779 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=779 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=779 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=779 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:36 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:25:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (TRX3@172.18.182.20:5700/3) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:45 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:45 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:25:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:45 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:51 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:51 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:25:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:25:56 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:25:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:25:56 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:25:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:25:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:25:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:02 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:07 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:07 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:07 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:26:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:26:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:26:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:26:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:26:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:26:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:26:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:24 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:24 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:24 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:26:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:29 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:29 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:29 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:26:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:41 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:26:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:41 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:46 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 13:26:46 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 200
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 13:26:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:48 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 13:26:48 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 0
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:48 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:26:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:26:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:26:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:26:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:26:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:26:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:26:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:26:53 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:26:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:53 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:26:53 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 13:26:53 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 200
2024-10-28 13:26:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] fake_trx.py:376 (BTS@172.18.182.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-28 13:26:55 [INFO] fake_trx.py:379 (BTS@172.18.182.20:5700) Artificial TRXC delay set to 0
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:26:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:26:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:26:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:27:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:27:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:27:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:27:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:27:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:27:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:27:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:27:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:27:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:27:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:27:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:27:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:27:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:27:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:27:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:27:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:27:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:27:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:27:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:27:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:27:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:27:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:27:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:27:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:27:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:27:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:27:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:27:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:27:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:27:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:27:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:27:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:27:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:27:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:27:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:27:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:27:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:27:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:27:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:27:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:27:12 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:27:12 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:12 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:27:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:27:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:15 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=818 tn=2 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:15 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=818 tn=3 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:15 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=818 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:15 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=818 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:15 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=818 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:15 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=818 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:27:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:22 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:27:24 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:27:25 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:27:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:25 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:26 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:26 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:27:26 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:27:27 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:27:28 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:29 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:29 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:27:31 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:32 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:32 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:27:41 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:44 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:44 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:44 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:27:46 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:47 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:47 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:47 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:48 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:48 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:27:48 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:27:49 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:51 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:51 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:54 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:54 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:27:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:27:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:27:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:27:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:27:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:27:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:27:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:27:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=9792 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:28:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:28:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:28:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:28:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:02 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:02 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:03 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:03 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:28:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:28:08 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:28:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:08 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:09 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:09 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:10 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:10 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:28:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:28:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:28:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:28:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:28:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:28:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:16 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:17 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:17 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:28:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:28:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:28:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:28:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:23 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:24 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:25 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:28:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:28:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:28:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:28:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:28:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:34 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:28:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:28:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:28:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:28:44 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:28:45 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:28:46 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:28:47 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:28:47 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:28:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:28:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:28:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:28:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:28:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:29:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:29:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:29:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:29:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:29:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:29:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:29:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:29:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:03 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:29:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:05 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:07 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:27 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:29:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:29:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:29:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:27 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=5671 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:29:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:29:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:29:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:29:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:29:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:29:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:29:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:29:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:29:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:29:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:29:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:29:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:29:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:29:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:38 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:42 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:29:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:29:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:29:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:47 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:48 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:29:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:29:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:29:48 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:29:52 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:29:53 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:29:54 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:08 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:30:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:30:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:30:14 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:30:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:15 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:15 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:15 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:30:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:30:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:30:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:30:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:22 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:24 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:24 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:24 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:24 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=905 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:30:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:30:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:30:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:30:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:30 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:30 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:32 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:32 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:30:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:30:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:30:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:30:37 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:39 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:41 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:43 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:45 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:45 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:47 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2142 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:30:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:30:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:30:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:52 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:53 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:53 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:30:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:54 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:30:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:30:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:30:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:30:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:30:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:30:59 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:30:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:00 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:00 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:01 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:01 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=445 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:07 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:07 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:07 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:08 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:14 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:15 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:21 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:21 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:31:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:25 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:34 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:34 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=990 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:41 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:42 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:44 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:50 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:50 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:31:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:31:51 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:31:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:53 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:31:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:31:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:31:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:31:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:31:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:31:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:31:59 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:31:59 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:31:59 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:31:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:31:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:31:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:31:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:32:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:32:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:32:05 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:05 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:32:05 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:05 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:32:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:32:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:32:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:32:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:32:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:32:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:32:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:32:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:32:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:25 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:26 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-28 13:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:28 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:29 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:29 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:30 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:30 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:32 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:33 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:34 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:34 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:35 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:35 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:32:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:38 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:32:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:32:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:32:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:44 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=347 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:32:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:32:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:32:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:32:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:32:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:32:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:32:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:32:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:32:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:32:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:32:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:32:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:32:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:33:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:33:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:33:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:33:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:33:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:33:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:33:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:33:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:33:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:33:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:33:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:33:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:33:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:33:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:33:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:33:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:33:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:33:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:33:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:34:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:34:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:34:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:34:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:34:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:34:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:34:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:34:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:34:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:34:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:34:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:34:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:34:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:34:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:34:06 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:06 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:06 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:34:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:34:10 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:14 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:34:18 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:21 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:34:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:34:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3454 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3454 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3454 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3454 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3454 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3454 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3455 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:34:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:34:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:34:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:34:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:34:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:34:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:34:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:34:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:34:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:34:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:34:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:34:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:34:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:34:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:34:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:34:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:34:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:34:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:34:29 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:34:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:34:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:34:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:34:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:34:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:34:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:34:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:34:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:34:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:34:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:34:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:34:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:34:35 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:34:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:34:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:34:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:34:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:34:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:34:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:34:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:34:39 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:34:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:34:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:34:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:34:41 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:34:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:34:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:34:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:34:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:43 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:34:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:34:44 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:34:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:34:45 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:34:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:34:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:34:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:34:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:34:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:34:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:34:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:34:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:34:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:34:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:34:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:51 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=5197 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:51 [WARNING] transceiver.py:250 (MS@172.18.182.22:6700) RX TRXD message (fn=5197 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:34:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:34:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:34:51 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:34:51 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:34:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:34:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:34:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:34:53 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:34:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:34:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:34:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:34:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:34:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:34:56 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:34:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:34:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:34:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:34:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:34:58 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:34:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:34:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6821 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:34:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6821 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6821 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:34:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6821 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:35:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:35:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:35:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:35:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:35:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:35:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:35:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:35:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:35:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:35:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:35:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:35:16 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:35:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:18 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:35:18 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:20 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:20 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1049 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:35:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:35:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:35:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:35:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:35:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:35:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:35:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:35:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:37 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:35:38 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:35:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:35:40 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:42 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:35:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:35:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:35:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:35:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:35:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:50 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=595 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:35:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:35:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:35:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:35:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:35:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:35:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:35:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:35:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:35:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:35:57 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=598 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:09 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:09 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:16 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=330 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:22 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:22 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:22 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:36:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:22 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:36:22 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:23 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:28 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:28 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:28 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:36:35 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:35 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:36:35 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:42 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:42 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:36:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:36:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:36:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:36:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:36:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:36:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:36:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:36:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:36:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:36:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:36:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:36:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:37:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:37:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:37:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:37:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:37:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:37:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:37:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:37:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:37:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:37:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:37:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:37:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:37:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:37:19 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:37:19 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:37:19 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:37:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:37:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:37:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:37:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:37:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (TRX3@172.18.182.20:5700/3) RX TRXD message (ver=1 fn=2075 tn=0 bl=148 pwr=4), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2075 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:37:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:37:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:37:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:37:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:37:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:37:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:37:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:37:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:37:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:37:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:37:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:37:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:37:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:37:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:37:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:37:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:37:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:37:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:37:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:37:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:37:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:37:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD NOHANDOVER
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:37:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:37:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:37:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:38:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:38:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:38:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:38:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:38:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:38:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:38:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:38:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:38:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:38:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:38:23 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:38:23 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:38:23 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:38:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:38:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:38:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:38:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:38:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:38:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:38:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:38:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:38:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:38:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:38:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:38:42 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:38:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:38:42 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:38:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:38:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:38:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:38:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:38:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:38:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:38:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:38:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:38:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:39:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:39:00 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:39:00 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:39:00 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:39:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:39:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:39:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:39:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:39:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:39:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:39:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:39:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:39:19 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:39:19 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:39:19 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:39:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:39:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:39:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:39:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:39:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:39:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:39:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:39:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:39:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:39:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:39:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:39:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:39:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:39:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:39:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:39:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:39:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:39:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:39:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:39:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:39:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:39:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:39:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:39:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:40:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:40:02 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:40:02 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:40:02 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:40:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:40:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:40:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:40:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:40:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:40:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:40:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:40:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:40:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:40:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:40:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:40:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:40:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:40:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:40:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:40:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:40:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:40:42 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:40:42 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:40:42 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:40:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:40:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:40:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:40:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:40:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:40:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:40:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:40:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:40:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:41:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:41:03 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:41:03 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:41:03 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:41:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:41:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:41:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:41:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:41:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:41:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:41:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:41:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:23 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4468 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:41:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:41:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:41:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:41:34 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:41:34 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:41:34 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:41:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:41:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:41:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:41:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:41:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:41:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:41:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:41:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:41:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:41:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:41:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:41:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:41:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:41:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:41:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:41:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:41:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:41:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:41:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:41:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:41:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:41:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:42:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:42:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:42:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:42:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:42:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:42:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:42:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:42:17 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:42:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:42:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:42:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:42:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:42:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:42:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:42:25 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:42:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:42:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:42:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:42:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:42:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:42:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:42:36 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:42:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:42:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:42:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:42:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:42:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:42:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:42:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:42:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:42:44 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:42:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:42:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:42:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:42:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:42:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:42:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:42:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:42:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:42:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:42:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:42:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:42:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:42:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:42:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:42:55 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:42:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:42:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:42:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:42:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:43:03 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:43:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:43:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:43:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:43:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:43:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:43:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:43:13 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:43:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:43:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:43:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:43:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:43:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:43:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:43:21 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:43:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=1864 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:43:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:43:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:43:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:43:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:43:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:43:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:43:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:43:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:43:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:43:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:43:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:43:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:43:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:43:46 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:43:46 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3173 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:43:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:43:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:43:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:43:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:43:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:43:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:43:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:43:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:43:57 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:43:57 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:43:57 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:43:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:43:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:43:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:43:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:43:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:43:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:44:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:44:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:44:05 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:44:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:44:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:44:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:44:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:44:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:44:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:44:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:44:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:44:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:44:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:44:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:44:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:44:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:44:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:44:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:44:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:44:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:44:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:44:36 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:44:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:44:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:44:36 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:44:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:44:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:44:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:44:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:44:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:44:47 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:47 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2516 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:44:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:44:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:44:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:44:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:44:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:44:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:44:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:44:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:44:58 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:44:58 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:44:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:44:58 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:44:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:44:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:44:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:45:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:45:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:45:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:45:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:45:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:45:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:45:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:45:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:45:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:45:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:45:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:45:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:45:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:45:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:45:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:30 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=2729 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:45:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:45:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:45:36 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:45:36 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:45:36 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:45:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:45:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:45:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:45:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:45:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:45:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:45:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:45:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:45:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:45:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:45:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:45:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:45:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:45:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:45:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:45:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:45:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:45:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:45:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:45:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:46:07 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:46:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:46:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:46:13 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:46:13 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:13 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:46:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:46:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:46:19 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:46:19 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:46:19 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:46:19 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:20 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:46:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:46:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:46:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:46:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:46:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:46:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:46:31 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:36 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:46:41 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:46 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:46:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:46:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:46:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:46:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:46:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:46:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:46:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:46:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:46:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:46:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:46:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:46:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:46:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:46:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:46:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:02 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:47:07 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:12 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:47:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:47:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:47:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:47:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:47:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:47:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:47:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:47:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:47:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:47:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:47:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:47:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:47:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:47:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:47:18 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:47:18 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:18 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:47:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:47:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:47:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:47:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:47:23 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:28 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:47:33 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:47:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:47:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:47:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:47:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:47:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:47:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:47:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:47:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:47:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:47:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:47:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:47:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:47:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:47:49 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:54 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:47:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:47:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:47:59 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:04 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:48:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:48:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:04 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4518 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:48:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:48:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:48:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:48:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:48:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:48:09 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:48:09 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:09 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:48:10 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:10 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:48:11 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:11 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:48:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:48:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:48:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:48:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:48:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:48:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:48:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:48:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:48:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:48:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:48:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:48:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:48:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:48:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:48:17 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:48:17 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:17 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:48:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:48:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:48:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:48:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:48:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:48:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:48:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:48:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:57 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:48:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:48:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 13:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 13:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 13:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 13:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 13:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 13:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 13:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 13:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 13:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 13:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 13:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 13:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 13:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 13:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 13:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 13:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 13:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 13:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 13:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 13:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 13:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 13:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 13:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 13:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 13:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 13:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 13:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 13:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 13:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 13:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 13:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 13:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 13:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:49:17 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 13:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 13:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 13:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 13:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 13:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 13:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 13:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 13:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 13:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 13:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 13:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 13:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 13:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 13:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 13:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 13:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 13:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 13:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 13:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 13:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 13:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 13:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 13:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 13:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 13:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 13:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 13:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 13:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 13:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 13:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 13:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 13:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 13:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 13:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 13:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 13:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 13:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 13:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 13:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 13:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 13:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 13:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:49:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:49:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:37 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=17583 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:49:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:49:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:49:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:49:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:49:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:49:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:49:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:49:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:49:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:49:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:49:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:49:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:49:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:49:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:49:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:49:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:49:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:49:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:49:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:49:48 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:49:48 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:49:48 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:49:49 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:49:49 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:49:49 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:50 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:49:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:49:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:49:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:49:57 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:00 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:00 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:03 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:03 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:06 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:50:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:50:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:06 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=4000 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:50:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:50:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:50:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:50:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:50:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:50:11 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:50:11 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:50:11 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:50:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:50:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:15 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:50:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:18 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:21 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:24 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:50:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:50:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:50:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:50:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:50:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:50:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:50:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:50:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:50:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:50:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:50:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:50:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:50:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:50:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:50:30 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:50:30 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:30 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:30 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:31 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:50:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:50:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:34 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:50:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:50:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:50:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:50:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:50:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:50:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:50:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:50:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:50:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:50:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:50:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:50:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:50:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:50:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:50:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:44 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:50:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:46 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:50:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:50:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:50:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:50:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:50:51 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:11 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:51:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:51:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:51:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:51:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:51:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:51:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:51:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:51:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:51:16 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:51:16 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:16 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:51:17 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:18 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:51:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:51:20 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:51:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:40 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:51:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:51:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:51:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:51:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:51:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:51:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:51:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:51:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:51:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:51:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:51:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:51:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:51:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:51:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:51:46 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:51:46 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:46 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:51:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:51:48 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:51:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:51:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:51:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:51 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:51:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:51:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:51:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:14 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:52:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:52:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:52:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:52:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:52:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:52:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:52:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:52:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:52:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:52:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:52:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:52:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:52:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:52:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:52:20 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:20 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:52:20 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:52:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:52:20 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:21 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:52:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:52:21 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:22 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:52:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:52:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:22 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=532 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:52:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:52:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:52:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:52:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:52:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:52:27 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:52:27 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:27 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:52:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:52:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:52:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:52:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:52:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:52:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:52:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:52:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:52:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:52:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:53:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:53:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:53:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:53:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:53:00 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 13:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 13:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 13:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 13:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 13:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 13:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-28 13:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-28 13:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-28 13:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-28 13:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-28 13:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-28 13:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-28 13:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-28 13:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-28 13:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-28 13:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-28 13:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-28 13:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-28 13:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-28 13:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-28 13:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-28 13:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-28 13:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-28 13:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-28 13:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-28 13:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-28 13:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-28 13:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-28 13:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-28 13:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-28 13:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-28 13:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-28 13:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-28 13:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-28 13:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-28 13:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-28 13:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-28 13:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-28 13:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-28 13:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-28 13:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-28 13:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-28 13:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-28 13:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-28 13:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-28 13:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:53:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:53:34 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:53:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:53:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:53:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-28 13:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-28 13:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-28 13:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-28 13:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-28 13:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-28 13:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-28 13:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-28 13:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-28 13:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-28 13:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-28 13:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-28 13:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-28 13:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-28 13:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-28 13:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-28 13:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-28 13:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-28 13:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-28 13:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-28 13:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-28 13:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-28 13:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-28 13:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-28 13:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-28 13:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-28 13:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-28 13:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-28 13:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-28 13:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-28 13:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-28 13:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-28 13:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-28 13:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-28 13:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-28 13:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-28 13:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-28 13:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-28 13:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-28 13:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-28 13:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-28 13:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-28 13:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-28 13:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-28 13:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-28 13:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-28 13:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-28 13:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-28 13:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-28 13:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-28 13:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-28 13:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-28 13:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-28 13:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-28 13:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-28 13:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-28 13:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-28 13:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-28 13:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-28 13:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-28 13:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-28 13:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-28 13:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-28 13:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-28 13:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-28 13:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-28 13:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-28 13:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-28 13:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-28 13:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-28 13:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-28 13:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-28 13:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-28 13:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:54:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:54:09 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-28 13:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-28 13:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-28 13:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-28 13:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-28 13:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-28 13:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-28 13:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-28 13:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-28 13:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-28 13:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-28 13:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-28 13:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-28 13:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-28 13:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-28 13:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-28 13:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-28 13:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-28 13:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-28 13:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-28 13:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-28 13:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-28 13:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-28 13:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-28 13:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-28 13:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-28 13:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-28 13:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-28 13:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-28 13:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-28 13:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-28 13:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-28 13:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:25 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:54:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:54:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25676 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25676 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25676 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25676 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25676 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=25677 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:54:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:54:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:54:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:54:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:54:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:54:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:54:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:54:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:54:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:54:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:54:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:54:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:54:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:54:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:54:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:54:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:54:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:54:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:54:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:54:35 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:54:35 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:54:35 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:54:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:54:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:54:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:54:37 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:54:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:39 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:54:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:54:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:54:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:54:43 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:44 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:54:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:54:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:54:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:54:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:54:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:54:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:54:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:54:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:54:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:54:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:54:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:54:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:54:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:54:50 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:54:50 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:50 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:54:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:54:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:54:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:54:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:55:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:55:05 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:20 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:55:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-28 13:55:29 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-28 13:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-28 13:55:30 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-28 13:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-28 13:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-28 13:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-28 13:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-28 13:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-28 13:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-28 13:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:55:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:55:34 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-28 13:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-28 13:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-28 13:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-28 13:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:37 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:55:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:55:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:55:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:55:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:55:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:55:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:55:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:55:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:55:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:55:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:55:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:55:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:55:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:55:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:55:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:55:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:55:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:55:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:55:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:55:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:55:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:55:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:55:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:55:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:55:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:55:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:55:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:55:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:55:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:55:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:55:58 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:56:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:56:00 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:56:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:56:01 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:56:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:56:02 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:56:02 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:56:05 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:56:06 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:08 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:56:15 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-28 13:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-28 13:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-28 13:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-28 13:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-28 13:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-28 13:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-28 13:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-28 13:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-28 13:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-28 13:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-28 13:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-28 13:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-28 13:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-28 13:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-28 13:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-28 13:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-28 13:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-28 13:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-28 13:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-28 13:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-28 13:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:56:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:56:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:56:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:56:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:56:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:56:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:56:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:56:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:56:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:56:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:56:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:56:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:56:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:56:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:56:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:56:32 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:33 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:56:34 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:56:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:38 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:56:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:56:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:56:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:56:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:56:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:56:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:56:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:56:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:56:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:56:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:56:47 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:56:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:50 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:56:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:56:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:56:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:56:58 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:56:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:56:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:56:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:56:58 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:57:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:57:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:57:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:57:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:57:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:57:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:57:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:57:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:57:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:57:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:57:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:57:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:57:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:57:04 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:05 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:57:06 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:57:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:57:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:26 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:57:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:57:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:57:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:57:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:57:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:57:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:57:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:57:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:57:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:57:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:57:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:57:34 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:57:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:39 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:57:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:57:46 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:46 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:57:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:57:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:57:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:57:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:57:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:57:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:57:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:57:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:57:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:57:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:57:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:57:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:57:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:57:52 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:57:52 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:52 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:57:54 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 13:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:56 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:57:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:57:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 13:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 13:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 13:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 13:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 13:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 13:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 13:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 13:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:58:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.182.22:6700) Recv SETFH cmd
2024-10-28 13:58:01 [INFO] transceiver.py:201 (MS@172.18.182.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 13:58:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 13:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 13:58:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 13:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 13:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 13:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 13:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 13:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 13:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 13:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 13:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 13:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 13:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 13:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-28 13:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-28 13:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-28 13:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-28 13:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-28 13:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-28 13:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-28 13:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-28 13:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-28 13:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-28 13:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-28 13:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-28 13:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-28 13:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-28 13:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-28 13:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-28 13:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-28 13:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-28 13:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-28 13:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-28 13:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-28 13:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-28 13:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-28 13:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-28 13:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-28 13:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-28 13:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-28 13:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-28 13:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:58:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:58:21 [INFO] transceiver.py:205 (MS@172.18.182.22:6700) Frequency hopping disabled
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (TRX1@172.18.182.20:5700/1) RX TRXD message (ver=1 fn=6383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:21 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=6383 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:58:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:58:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:58:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:58:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:58:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=406 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=406 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=406 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:28 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:58:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:58:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:58:33 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:58:33 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:58:33 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:58:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:58:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:58:40 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:58:40 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:40 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:58:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:42 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:58:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:58:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:58:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:58:47 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:58:47 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:47 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:58:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:58:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:58:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:58:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:58:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:58:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:58:54 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:58:54 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:58:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:58:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:58:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:01 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:01 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:08 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:08 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:15 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:15 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:15 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:59:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:59:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:59:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:59:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:59:15 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:21 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:21 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:26 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:26 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:32 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:32 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:38 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:38 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:43 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:43 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:49 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:49 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 13:59:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 13:59:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 13:59:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 13:59:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 13:59:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 13:59:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 13:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 13:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 13:59:55 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 13:59:55 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 13:59:55 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:59:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 13:59:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 13:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 13:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 13:59:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 13:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 13:59:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 13:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 13:59:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 13:59:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 13:59:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 13:59:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 14:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 14:00:04 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 14:00:04 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:04 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 14:00:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 14:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 14:00:10 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:10 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 14:00:10 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 14:00:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 14:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 14:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 14:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-28 14:00:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-28 14:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-28 14:00:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-28 14:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-28 14:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-28 14:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-28 14:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-28 14:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-28 14:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-28 14:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-28 14:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-28 14:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-28 14:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-28 14:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-28 14:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-28 14:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-28 14:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-28 14:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-28 14:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-28 14:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-28 14:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-28 14:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-28 14:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-28 14:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-28 14:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-28 14:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-28 14:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:25 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 14:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 14:00:31 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 14:00:31 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:31 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:31 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 14:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-28 14:00:37 [DEBUG] fake_trx.py:272 (BTS@172.18.182.20:5700) Recv FAKE_TOA cmd
2024-10-28 14:00:37 [DEBUG] fake_trx.py:291 (BTS@172.18.182.20:5700) Recv FAKE_RSSI cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:37 [DEBUG] fake_trx.py:316 (BTS@172.18.182.20:5700) Recv FAKE_CI cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD HANDOVER
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-28 14:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-28 14:00:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD ECHO
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.182.22:6700) Ignore CMD SETSLOT
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.182.22:6700) Recv RXTUNE cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.182.22:6700) Recv TXTUNE cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.182.22:6700) Recv POWERON CMD
2024-10-28 14:00:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.182.22:6700) Starting transceiver...
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD NOHANDOVER
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.182.22:6700) Recv POWEROFF cmd
2024-10-28 14:00:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.182.22:6700) Stopping transceiver...
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.182.20:5700) Recv SETPOWER cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.182.20:5700/1) Recv SETPOWER cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.182.20:5700/2) Recv SETPOWER cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.182.20:5700/3) Recv SETPOWER cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:39 [WARNING] transceiver.py:250 (BTS@172.18.182.20:5700) RX TRXD message (ver=1 fn=574 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 14:00:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.182.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.182.20:5700) Recv SETFORMAT cmd
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.182.20:5700) TRXD header version 1 -> 1
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.182.20:5700/1) Recv RXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.182.20:5700/1) Recv TXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.182.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.182.20:5700/1) Recv NOMTXPOWER cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.182.20:5700/1) Recv SETFORMAT cmd
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.182.20:5700/1) TRXD header version 1 -> 1
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.182.20:5700/2) Recv RXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.182.20:5700/2) Recv TXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.182.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.182.20:5700/2) Recv NOMTXPOWER cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.182.20:5700/2) Recv SETFORMAT cmd
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.182.20:5700/2) TRXD header version 1 -> 1
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.182.20:5700/3) Recv RXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.182.20:5700/3) Recv TXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.182.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.182.20:5700/3) Recv NOMTXPOWER cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.182.20:5700/3) Recv SETFORMAT cmd
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.182.20:5700/3) TRXD header version 1 -> 1
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.182.20:5700) Recv RXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETTSC
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETTSC
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETTSC
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.182.20:5700) Recv TXTUNE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETRXGAIN
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETTSC
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETRXGAIN
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETRXGAIN
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.182.20:5700) Recv NOMTXPOWER cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.182.20:5700) Recv POWERON CMD
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.182.20:5700) Starting transceiver...
2024-10-28 14:00:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETRXGAIN
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.182.20:5700/1) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.182.20:5700/2) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.182.20:5700/1) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.182.20:5700/2) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.182.20:5700) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.182.20:5700/3) Ignore CMD SETSLOT
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.182.20:5700) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.182.20:5700/3) Recv RFMUTE cmd
2024-10-28 14:00:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.182.20:5700) Recv POWEROFF cmd
2024-10-28 14:00:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.182.20:5700) Stopping transceiver...
2024-10-28 14:00:54 [INFO] transceiver.py:239 Stopping clock generator