\doxysection{gsm\+\_\+08\+\_\+58.\+h}
\label{gsm__08__58_8h_source}\index{include/osmocom/gsm/protocol/gsm\_08\_58.h@{include/osmocom/gsm/protocol/gsm\_08\_58.h}}
\textbf{ Go to the documentation of this file.}
\begin{DoxyCode}{0}
\DoxyCodeLine{1 }
\DoxyCodeLine{4 \textcolor{comment}{/*}}
\DoxyCodeLine{5 \textcolor{comment}{ * (C) 2008 by Harald Welte <laforge@gnumonks.org>}}
\DoxyCodeLine{6 \textcolor{comment}{ * All Rights Reserved}}
\DoxyCodeLine{7 \textcolor{comment}{ *}}
\DoxyCodeLine{8 \textcolor{comment}{ * This program is free software; you can redistribute it and/or modify}}
\DoxyCodeLine{9 \textcolor{comment}{ * it under the terms of the GNU General Public License as published by}}
\DoxyCodeLine{10 \textcolor{comment}{ * the Free Software Foundation; either version 2 of the License, or}}
\DoxyCodeLine{11 \textcolor{comment}{ * (at your option) any later version.}}
\DoxyCodeLine{12 \textcolor{comment}{ *}}
\DoxyCodeLine{13 \textcolor{comment}{ * This program is distributed in the hope that it will be useful,}}
\DoxyCodeLine{14 \textcolor{comment}{ * but WITHOUT ANY WARRANTY; without even the implied warranty of}}
\DoxyCodeLine{15 \textcolor{comment}{ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the}}
\DoxyCodeLine{16 \textcolor{comment}{ * GNU General Public License for more details.}}
\DoxyCodeLine{17 \textcolor{comment}{ *}}
\DoxyCodeLine{18 \textcolor{comment}{ */}}
\DoxyCodeLine{19 }
\DoxyCodeLine{20 \textcolor{preprocessor}{\#pragma once}}
\DoxyCodeLine{21 }
\DoxyCodeLine{22 \textcolor{preprocessor}{\#include <stdint.h>}}
\DoxyCodeLine{23 }
\DoxyCodeLine{24 \textcolor{preprocessor}{\#include <osmocom/core/endian.h>}}
\DoxyCodeLine{25 }
\DoxyCodeLine{30 \textcolor{comment}{/* Channel Number 9.3.1 */}}
\DoxyCodeLine{31 \textcolor{keyword}{union }abis\_rsl\_chan\_nr \{}
\DoxyCodeLine{32         \textcolor{keyword}{struct }\{}
\DoxyCodeLine{33 \textcolor{preprocessor}{\#if OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{34                 uint8\_t cbits:5,}
\DoxyCodeLine{35                         tn:3;}
\DoxyCodeLine{36 \textcolor{preprocessor}{\#elif OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{37                 uint8\_t tn:3,}
\DoxyCodeLine{38                         cbits:5;}
\DoxyCodeLine{39 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{40         \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{41         uint8\_t chan\_nr;}
\DoxyCodeLine{42 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{43 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_Bm\_ACCHs 0x01}}
\DoxyCodeLine{44 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_Lm\_ACCHs(ss)     (0x02 + (ss))}}
\DoxyCodeLine{45 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_SDCCH4\_ACCH(ss)  (0x04 + (ss))}}
\DoxyCodeLine{46 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_SDCCH8\_ACCH(ss)  (0x08 + (ss))}}
\DoxyCodeLine{47 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_BCCH             0x10}}
\DoxyCodeLine{48 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_RACH             0x11}}
\DoxyCodeLine{49 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_PCH\_AGCH 0x12}}
\DoxyCodeLine{50 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_OSMO\_PDCH        0x18 }\textcolor{comment}{/*< non-\/standard, for dyn TS */}\textcolor{preprocessor}{}}
\DoxyCodeLine{51 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_OSMO\_CBCH4       0x19 }\textcolor{comment}{/*< non-\/standard, for CBCH/SDCCH4 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{52 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_OSMO\_CBCH8       0x1a }\textcolor{comment}{/*< non-\/standard, for CBCH/SDCCH8 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{53 }
\DoxyCodeLine{54 \textcolor{comment}{/* non-\/standard, Osmocom specific Bm/Lm equivalents for VAMOS */}}
\DoxyCodeLine{55 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_OSMO\_VAMOS\_Bm\_ACCHs      0x1d            }\textcolor{comment}{/*< VAMOS TCH/F */}\textcolor{preprocessor}{}}
\DoxyCodeLine{56 \textcolor{preprocessor}{\#define ABIS\_RSL\_CHAN\_NR\_CBITS\_OSMO\_VAMOS\_Lm\_ACCHs(ss)  (0x1e + (ss))   }\textcolor{comment}{/*< VAMOS TCH/H */}\textcolor{preprocessor}{}}
\DoxyCodeLine{57 }
\DoxyCodeLine{58 \textcolor{comment}{/* Link Identifier 9.3.2 */}}
\DoxyCodeLine{59 \textcolor{keyword}{union }abis\_rsl\_link\_id \{}
\DoxyCodeLine{60         \textcolor{keyword}{struct }\{}
\DoxyCodeLine{61 \textcolor{preprocessor}{\#if OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{62                 uint8\_t cbits:2,}
\DoxyCodeLine{63                         na:1,}
\DoxyCodeLine{64                         reserved:2,}
\DoxyCodeLine{65                         sapi:3;}
\DoxyCodeLine{66 \textcolor{preprocessor}{\#elif OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{67                 uint8\_t sapi:3,}
\DoxyCodeLine{68                         reserved:2,}
\DoxyCodeLine{69                         na:1,}
\DoxyCodeLine{70                         cbits:2;}
\DoxyCodeLine{71 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{72         \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{73         uint8\_t link\_id;}
\DoxyCodeLine{74 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{75 \textcolor{preprocessor}{\#define ABIS\_RSL\_LINK\_ID\_CBITS\_FACCH\_SDCCH 0x00}}
\DoxyCodeLine{76 \textcolor{preprocessor}{\#define ABIS\_RSL\_LINK\_ID\_CBITS\_SACCH 0x01}}
\DoxyCodeLine{77 }
\DoxyCodeLine{79 \textcolor{keyword}{struct }abis\_rsl\_common\_hdr \{}
\DoxyCodeLine{80         uint8\_t msg\_discr;     }
\DoxyCodeLine{81         uint8\_t msg\_type;       }
\DoxyCodeLine{82         uint8\_t data[0];    }
\DoxyCodeLine{83 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{84 }
\DoxyCodeLine{85 \textcolor{comment}{/* RSL RLL header (Chapter 8.3) */}}
\DoxyCodeLine{86 \textcolor{keyword}{struct }abis\_rsl\_rll\_hdr \{}
\DoxyCodeLine{87         \textcolor{keyword}{struct }abis\_rsl\_common\_hdr c;}
\DoxyCodeLine{88         uint8\_t ie\_chan; }
\DoxyCodeLine{89         \textcolor{keyword}{union }\{}
\DoxyCodeLine{90                 uint8\_t chan\_nr;  \textcolor{comment}{/* API backward compat */}}
\DoxyCodeLine{91                 \textcolor{keyword}{union }abis\_rsl\_chan\_nr chan\_nr\_fields; }
\DoxyCodeLine{92         \};}
\DoxyCodeLine{93         uint8\_t ie\_link\_id;   }
\DoxyCodeLine{94         \textcolor{keyword}{union }\{}
\DoxyCodeLine{95                 uint8\_t link\_id; \textcolor{comment}{/* API backward compat */}}
\DoxyCodeLine{96                 \textcolor{keyword}{union }abis\_rsl\_link\_id link\_id\_fields; }
\DoxyCodeLine{97         \};}
\DoxyCodeLine{98         uint8\_t data[0];    }
\DoxyCodeLine{99 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{100 }
\DoxyCodeLine{101 \textcolor{comment}{/* RSL Dedicated Channel header (Chapter 8.3 and 8.4) */}}
\DoxyCodeLine{102 \textcolor{keyword}{struct }abis\_rsl\_dchan\_hdr \{}
\DoxyCodeLine{103         \textcolor{keyword}{struct }abis\_rsl\_common\_hdr c;}
\DoxyCodeLine{104         uint8\_t ie\_chan; }
\DoxyCodeLine{105         \textcolor{keyword}{union }\{}
\DoxyCodeLine{106                 uint8\_t chan\_nr;  \textcolor{comment}{/* API backward compat */}}
\DoxyCodeLine{107                 \textcolor{keyword}{union }abis\_rsl\_chan\_nr chan\_nr\_fields; }
\DoxyCodeLine{108         \};}
\DoxyCodeLine{109         uint8\_t data[0];    }
\DoxyCodeLine{110 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{111 }
\DoxyCodeLine{112 \textcolor{comment}{/* RSL Common Channel header (Chapter 8.5) */}}
\DoxyCodeLine{113 \textcolor{keyword}{struct }abis\_rsl\_cchan\_hdr \{}
\DoxyCodeLine{114         \textcolor{keyword}{struct }abis\_rsl\_common\_hdr c;}
\DoxyCodeLine{115         uint8\_t ie\_chan; }
\DoxyCodeLine{116         \textcolor{keyword}{union }\{}
\DoxyCodeLine{117                 uint8\_t chan\_nr;  \textcolor{comment}{/* API backward compat */}}
\DoxyCodeLine{118                 \textcolor{keyword}{union }abis\_rsl\_chan\_nr chan\_nr\_fields; }
\DoxyCodeLine{119         \};}
\DoxyCodeLine{120         uint8\_t data[0];    }
\DoxyCodeLine{121 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{122 }
\DoxyCodeLine{123 \textcolor{comment}{/* Osmocom specific IE to negotiate repeated ACCH capabilities */}}
\DoxyCodeLine{124 \textcolor{keyword}{struct }abis\_rsl\_osmo\_rep\_acch\_cap \{}
\DoxyCodeLine{125 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{126         uint8\_t dl\_facch\_cmd:1,}
\DoxyCodeLine{127                 dl\_facch\_all:1,}
\DoxyCodeLine{128                 dl\_sacch:1,}
\DoxyCodeLine{129                 ul\_sacch:1,}
\DoxyCodeLine{130                 rxqual:3,}
\DoxyCodeLine{131                 reserved:1;}
\DoxyCodeLine{132 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{133 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{134         uint8\_t reserved:1, rxqual:3, ul\_sacch:1, dl\_sacch:1, dl\_facch\_all:1, dl\_facch\_cmd:1;}
\DoxyCodeLine{135 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{136 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{137 }
\DoxyCodeLine{138 \textcolor{comment}{/* Osmocom specific IE to negotiate temporary overpower of ACCH channels */}}
\DoxyCodeLine{139 \textcolor{keyword}{struct }abis\_rsl\_osmo\_temp\_ovp\_acch\_cap \{}
\DoxyCodeLine{140 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{141         uint8\_t overpower\_db:3,}
\DoxyCodeLine{142                 rxqual:3,}
\DoxyCodeLine{143                 facch\_enable:1,}
\DoxyCodeLine{144                 sacch\_enable:1;}
\DoxyCodeLine{145 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{146 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{147         uint8\_t sacch\_enable:1, facch\_enable:1, rxqual:3, overpower\_db:3;}
\DoxyCodeLine{148 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{149 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{150 }
\DoxyCodeLine{151 \textcolor{comment}{/* Chapter 9.1 */}}
\DoxyCodeLine{152 \textcolor{comment}{/* RSL Message Discriminator: RLL */}}
\DoxyCodeLine{153 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_RLL              0x02}}
\DoxyCodeLine{154 \textcolor{comment}{/* RSL Message Discriminator: Dedicated Channel */}}
\DoxyCodeLine{155 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_DED\_CHAN         0x08}}
\DoxyCodeLine{156 \textcolor{comment}{/* RSL Message Discriminator: Common Channel */}}
\DoxyCodeLine{157 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_COM\_CHAN         0x0c}}
\DoxyCodeLine{158 \textcolor{comment}{/* RSL Message Discriminator: TRX Management */}}
\DoxyCodeLine{159 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_TRX              0x10}}
\DoxyCodeLine{160 \textcolor{comment}{/* RSL Message Discriminator: Location Service */}}
\DoxyCodeLine{161 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_LOC              0x20}}
\DoxyCodeLine{162 \textcolor{comment}{/* RSL Message Discriminator: ip.access */}}
\DoxyCodeLine{163 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_IPACCESS         0x7e}}
\DoxyCodeLine{164 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_TRANSP           0x01}}
\DoxyCodeLine{165 }
\DoxyCodeLine{166 \textcolor{comment}{/* Check if given RSL message discriminator is transparent */}}
\DoxyCodeLine{167 \textcolor{preprocessor}{\#define ABIS\_RSL\_MDISC\_IS\_TRANSP(x)     (x \& 0x01)}}
\DoxyCodeLine{168 }
\DoxyCodeLine{169 \textcolor{comment}{/* RSL Message Type (Chapter 9.1) */}}
\DoxyCodeLine{170 \textcolor{keyword}{enum} abis\_rsl\_msgtype \{}
\DoxyCodeLine{171         \textcolor{comment}{/* Radio Link Layer Management */}}
\DoxyCodeLine{172         RSL\_MT\_DATA\_REQ                  = 0x01,}
\DoxyCodeLine{173         RSL\_MT\_DATA\_IND,}
\DoxyCodeLine{174         RSL\_MT\_ERROR\_IND,}
\DoxyCodeLine{175         RSL\_MT\_EST\_REQ,}
\DoxyCodeLine{176         RSL\_MT\_EST\_CONF,}
\DoxyCodeLine{177         RSL\_MT\_EST\_IND,}
\DoxyCodeLine{178         RSL\_MT\_REL\_REQ,}
\DoxyCodeLine{179         RSL\_MT\_REL\_CONF,}
\DoxyCodeLine{180         RSL\_MT\_REL\_IND,}
\DoxyCodeLine{181         RSL\_MT\_UNIT\_DATA\_REQ,}
\DoxyCodeLine{182         RSL\_MT\_UNIT\_DATA\_IND,               \textcolor{comment}{/* 0x0b */}}
\DoxyCodeLine{183         RSL\_MT\_SUSP\_REQ,         \textcolor{comment}{/* non-\/standard elements */}}
\DoxyCodeLine{184         RSL\_MT\_SUSP\_CONF,}
\DoxyCodeLine{185         RSL\_MT\_RES\_REQ,}
\DoxyCodeLine{186         RSL\_MT\_RECON\_REQ,               \textcolor{comment}{/* 0x0f */}}
\DoxyCodeLine{187 }
\DoxyCodeLine{188         \textcolor{comment}{/* Common Channel Management / TRX Management */}}
\DoxyCodeLine{189         RSL\_MT\_BCCH\_INFO                        = 0x11,}
\DoxyCodeLine{190         RSL\_MT\_CCCH\_LOAD\_IND,}
\DoxyCodeLine{191         RSL\_MT\_CHAN\_RQD,}
\DoxyCodeLine{192         RSL\_MT\_DELETE\_IND,}
\DoxyCodeLine{193         RSL\_MT\_PAGING\_CMD,}
\DoxyCodeLine{194         RSL\_MT\_IMMEDIATE\_ASSIGN\_CMD,}
\DoxyCodeLine{195         RSL\_MT\_SMS\_BC\_REQ,}
\DoxyCodeLine{196         RSL\_MT\_CHAN\_CONF,               \textcolor{comment}{/* non-\/standard element */}}
\DoxyCodeLine{197         \textcolor{comment}{/* empty */}}
\DoxyCodeLine{198         RSL\_MT\_RF\_RES\_IND                      = 0x19,}
\DoxyCodeLine{199         RSL\_MT\_SACCH\_FILL,}
\DoxyCodeLine{200         RSL\_MT\_OVERLOAD,}
\DoxyCodeLine{201         RSL\_MT\_ERROR\_REPORT,}
\DoxyCodeLine{202         RSL\_MT\_SMS\_BC\_CMD,}
\DoxyCodeLine{203         RSL\_MT\_CBCH\_LOAD\_IND,}
\DoxyCodeLine{204         RSL\_MT\_NOT\_CMD,                   \textcolor{comment}{/* 0x1f */}}
\DoxyCodeLine{205 }
\DoxyCodeLine{206         \textcolor{comment}{/* Dedicate Channel Management */}}
\DoxyCodeLine{207         RSL\_MT\_CHAN\_ACTIV                      = 0x21,}
\DoxyCodeLine{208         RSL\_MT\_CHAN\_ACTIV\_ACK,}
\DoxyCodeLine{209         RSL\_MT\_CHAN\_ACTIV\_NACK,}
\DoxyCodeLine{210         RSL\_MT\_CONN\_FAIL,}
\DoxyCodeLine{211         RSL\_MT\_DEACTIVATE\_SACCH,}
\DoxyCodeLine{212         RSL\_MT\_ENCR\_CMD,}
\DoxyCodeLine{213         RSL\_MT\_HANDO\_DET,}
\DoxyCodeLine{214         RSL\_MT\_MEAS\_RES,}
\DoxyCodeLine{215         RSL\_MT\_MODE\_MODIFY\_REQ,}
\DoxyCodeLine{216         RSL\_MT\_MODE\_MODIFY\_ACK,}
\DoxyCodeLine{217         RSL\_MT\_MODE\_MODIFY\_NACK,}
\DoxyCodeLine{218         RSL\_MT\_PHY\_CONTEXT\_REQ,}
\DoxyCodeLine{219         RSL\_MT\_PHY\_CONTEXT\_CONF,}
\DoxyCodeLine{220         RSL\_MT\_RF\_CHAN\_REL,}
\DoxyCodeLine{221         RSL\_MT\_MS\_POWER\_CONTROL,}
\DoxyCodeLine{222         RSL\_MT\_BS\_POWER\_CONTROL,         \textcolor{comment}{/* 0x30 */}}
\DoxyCodeLine{223         RSL\_MT\_PREPROC\_CONFIG,}
\DoxyCodeLine{224         RSL\_MT\_PREPROC\_MEAS\_RES,}
\DoxyCodeLine{225         RSL\_MT\_RF\_CHAN\_REL\_ACK,}
\DoxyCodeLine{226         RSL\_MT\_SACCH\_INFO\_MODIFY,}
\DoxyCodeLine{227         RSL\_MT\_TALKER\_DET,}
\DoxyCodeLine{228         RSL\_MT\_LISTENER\_DET,}
\DoxyCodeLine{229         RSL\_MT\_REMOTE\_CODEC\_CONF\_REP,}
\DoxyCodeLine{230         RSL\_MT\_RTD\_REP,}
\DoxyCodeLine{231         RSL\_MT\_PRE\_HANDO\_NOTIF,}
\DoxyCodeLine{232         RSL\_MT\_MR\_CODEC\_MOD\_REQ,}
\DoxyCodeLine{233         RSL\_MT\_MR\_CODEC\_MOD\_ACK,}
\DoxyCodeLine{234         RSL\_MT\_MR\_CODEC\_MOD\_NACK,}
\DoxyCodeLine{235         RSL\_MT\_MR\_CODEC\_MOD\_PER,}
\DoxyCodeLine{236         RSL\_MT\_TFO\_REP,}
\DoxyCodeLine{237         RSL\_MT\_TFO\_MOD\_REQ,           \textcolor{comment}{/* 0x3f */}}
\DoxyCodeLine{238         RSL\_MT\_LOCATION\_INFO                = 0x41,}
\DoxyCodeLine{239 }
\DoxyCodeLine{240         \textcolor{comment}{/* ip.access specific RSL message types */}}
\DoxyCodeLine{241         RSL\_MT\_IPAC\_DIR\_RETR\_ENQ        = 0x40,}
\DoxyCodeLine{242         RSL\_MT\_IPAC\_PDCH\_ACT                = 0x48,}
\DoxyCodeLine{243         RSL\_MT\_IPAC\_PDCH\_ACT\_ACK,}
\DoxyCodeLine{244         RSL\_MT\_IPAC\_PDCH\_ACT\_NACK,}
\DoxyCodeLine{245         RSL\_MT\_IPAC\_PDCH\_DEACT            = 0x4b,}
\DoxyCodeLine{246         RSL\_MT\_IPAC\_PDCH\_DEACT\_ACK,}
\DoxyCodeLine{247         RSL\_MT\_IPAC\_PDCH\_DEACT\_NACK,}
\DoxyCodeLine{248         RSL\_MT\_IPAC\_CONNECT\_MUX          = 0x50,}
\DoxyCodeLine{249         RSL\_MT\_IPAC\_CONNECT\_MUX\_ACK,}
\DoxyCodeLine{250         RSL\_MT\_IPAC\_CONNECT\_MUX\_NACK,}
\DoxyCodeLine{251         RSL\_MT\_IPAC\_BIND\_MUX                = 0x53,}
\DoxyCodeLine{252         RSL\_MT\_IPAC\_BIND\_MUX\_ACK,}
\DoxyCodeLine{253         RSL\_MT\_IPAC\_BIND\_MUX\_NACK,}
\DoxyCodeLine{254         RSL\_MT\_IPAC\_DISC\_MUX                = 0x56,}
\DoxyCodeLine{255         RSL\_MT\_IPAC\_DISC\_MUX\_ACK,}
\DoxyCodeLine{256         RSL\_MT\_IPAC\_DISC\_MUX\_NACK,}
\DoxyCodeLine{257         RSL\_MT\_IPAC\_MEAS\_PREPROC\_DFT        = 0x60,         \textcolor{comment}{/*Extented Common Channel Management */}}
\DoxyCodeLine{258         RSL\_MT\_IPAC\_HO\_CAN\_ENQ            = 0x61,}
\DoxyCodeLine{259         RSL\_MT\_IPAC\_HO\_CAN\_RES            = 0x62,}
\DoxyCodeLine{260         RSL\_MT\_IPAC\_CRCX                = 0x70,         \textcolor{comment}{/* Bind to local BTS RTP port */}}
\DoxyCodeLine{261         RSL\_MT\_IPAC\_CRCX\_ACK,}
\DoxyCodeLine{262         RSL\_MT\_IPAC\_CRCX\_NACK,}
\DoxyCodeLine{263         RSL\_MT\_IPAC\_MDCX                = 0x73,}
\DoxyCodeLine{264         RSL\_MT\_IPAC\_MDCX\_ACK,}
\DoxyCodeLine{265         RSL\_MT\_IPAC\_MDCX\_NACK,}
\DoxyCodeLine{266         RSL\_MT\_IPAC\_DLCX\_IND                = 0x76,}
\DoxyCodeLine{267         RSL\_MT\_IPAC\_DLCX                = 0x77,}
\DoxyCodeLine{268         RSL\_MT\_IPAC\_DLCX\_ACK,}
\DoxyCodeLine{269         RSL\_MT\_IPAC\_DLCX\_NACK,}
\DoxyCodeLine{270 }
\DoxyCodeLine{271         RSL\_MT\_OSMO\_ETWS\_CMD                = 0x7f,}
\DoxyCodeLine{272 \};}
\DoxyCodeLine{273 }
\DoxyCodeLine{275 \textcolor{keyword}{enum} abis\_rsl\_msgtype\_siemens \{}
\DoxyCodeLine{276         RSL\_MT\_SIEMENS\_MRPCI                = 0x41,}
\DoxyCodeLine{277         RSL\_MT\_SIEMENS\_INTRAC\_HO\_COND\_IND = 0x42,}
\DoxyCodeLine{278         RSL\_MT\_SIEMENS\_INTERC\_HO\_COND\_IND = 0x43,}
\DoxyCodeLine{279         RSL\_MT\_SIEMENS\_FORCED\_HO\_REQ        = 0x44,}
\DoxyCodeLine{280         RSL\_MT\_SIEMENS\_PREF\_AREA\_REQ        = 0x45,}
\DoxyCodeLine{281         RSL\_MT\_SIEMENS\_PREF\_AREA        = 0x46,}
\DoxyCodeLine{282         RSL\_MT\_SIEMENS\_START\_TRACE    = 0x47,}
\DoxyCodeLine{283         RSL\_MT\_SIEMENS\_START\_TRACE\_ACK    = 0x48,}
\DoxyCodeLine{284         RSL\_MT\_SIEMENS\_STOP\_TRACE      = 0x49,}
\DoxyCodeLine{285         RSL\_MT\_SIEMENS\_TRMR          = 0x4a,}
\DoxyCodeLine{286         RSL\_MT\_SIEMENS\_HO\_FAIL\_IND    = 0x4b,}
\DoxyCodeLine{287         RSL\_MT\_SIEMENS\_STOP\_TRACE\_ACK      = 0x4c,}
\DoxyCodeLine{288         RSL\_MT\_SIEMENS\_UPLF          = 0x4d,}
\DoxyCodeLine{289         RSL\_MT\_SIEMENS\_UPLB          = 0x4e,}
\DoxyCodeLine{290         RSL\_MT\_SIEMENS\_SET\_SYS\_INFO\_10    = 0x4f,}
\DoxyCodeLine{291         RSL\_MT\_SIEMENS\_MODIF\_COND\_IND      = 0x50,}
\DoxyCodeLine{292 \};}
\DoxyCodeLine{293 }
\DoxyCodeLine{295 \textcolor{keyword}{enum} abis\_rsl\_msgtype\_ericsson \{}
\DoxyCodeLine{296         RSL\_MT\_ERICSSON\_IMM\_ASS\_SENT        = 0x10,}
\DoxyCodeLine{297 \};}
\DoxyCodeLine{298 }
\DoxyCodeLine{300 \textcolor{keyword}{enum} abis\_rsl\_ie \{}
\DoxyCodeLine{301         RSL\_IE\_CHAN\_NR                    = 0x01,}
\DoxyCodeLine{302         RSL\_IE\_LINK\_IDENT,}
\DoxyCodeLine{303         RSL\_IE\_ACT\_TYPE,}
\DoxyCodeLine{304         RSL\_IE\_BS\_POWER,}
\DoxyCodeLine{305         RSL\_IE\_CHAN\_IDENT,}
\DoxyCodeLine{306         RSL\_IE\_CHAN\_MODE,}
\DoxyCodeLine{307         RSL\_IE\_ENCR\_INFO,}
\DoxyCodeLine{308         RSL\_IE\_FRAME\_NUMBER,}
\DoxyCodeLine{309         RSL\_IE\_HANDO\_REF,}
\DoxyCodeLine{310         RSL\_IE\_L1\_INFO,}
\DoxyCodeLine{311         RSL\_IE\_L3\_INFO,}
\DoxyCodeLine{312         RSL\_IE\_MS\_IDENTITY,}
\DoxyCodeLine{313         RSL\_IE\_MS\_POWER,}
\DoxyCodeLine{314         RSL\_IE\_PAGING\_GROUP,}
\DoxyCodeLine{315         RSL\_IE\_PAGING\_LOAD,}
\DoxyCodeLine{316         RSL\_IE\_PYHS\_CONTEXT          = 0x10,}
\DoxyCodeLine{317         RSL\_IE\_ACCESS\_DELAY,}
\DoxyCodeLine{318         RSL\_IE\_RACH\_LOAD,}
\DoxyCodeLine{319         RSL\_IE\_REQ\_REFERENCE,}
\DoxyCodeLine{320         RSL\_IE\_RELEASE\_MODE,}
\DoxyCodeLine{321         RSL\_IE\_RESOURCE\_INFO,}
\DoxyCodeLine{322         RSL\_IE\_RLM\_CAUSE,}
\DoxyCodeLine{323         RSL\_IE\_STARTNG\_TIME,}
\DoxyCodeLine{324         RSL\_IE\_TIMING\_ADVANCE,}
\DoxyCodeLine{325         RSL\_IE\_UPLINK\_MEAS,}
\DoxyCodeLine{326         RSL\_IE\_CAUSE,}
\DoxyCodeLine{327         RSL\_IE\_MEAS\_RES\_NR,}
\DoxyCodeLine{328         RSL\_IE\_MSG\_ID,}
\DoxyCodeLine{329         \textcolor{comment}{/* reserved */}}
\DoxyCodeLine{330         RSL\_IE\_SYSINFO\_TYPE          = 0x1e,}
\DoxyCodeLine{331         RSL\_IE\_MS\_POWER\_PARAM,}
\DoxyCodeLine{332         RSL\_IE\_BS\_POWER\_PARAM,}
\DoxyCodeLine{333         RSL\_IE\_PREPROC\_PARAM,}
\DoxyCodeLine{334         RSL\_IE\_PREPROC\_MEAS,}
\DoxyCodeLine{335         RSL\_IE\_IMM\_ASS\_INFO,         \textcolor{comment}{/* Phase 1 (3.6.0), later Full below */}}
\DoxyCodeLine{336         RSL\_IE\_SMSCB\_INFO              = 0x24,}
\DoxyCodeLine{337         RSL\_IE\_MS\_TIMING\_OFFSET,}
\DoxyCodeLine{338         RSL\_IE\_ERR\_MSG,}
\DoxyCodeLine{339         RSL\_IE\_FULL\_BCCH\_INFO,}
\DoxyCodeLine{340         RSL\_IE\_CHAN\_NEEDED,}
\DoxyCodeLine{341         RSL\_IE\_CB\_CMD\_TYPE,}
\DoxyCodeLine{342         RSL\_IE\_SMSCB\_MSG,}
\DoxyCodeLine{343         RSL\_IE\_FULL\_IMM\_ASS\_INFO,}
\DoxyCodeLine{344         RSL\_IE\_SACCH\_INFO,}
\DoxyCodeLine{345         RSL\_IE\_CBCH\_LOAD\_INFO,}
\DoxyCodeLine{346         RSL\_IE\_SMSCB\_CHAN\_INDICATOR,}
\DoxyCodeLine{347         RSL\_IE\_GROUP\_CALL\_REF,}
\DoxyCodeLine{348         RSL\_IE\_CHAN\_DESC                = 0x30,}
\DoxyCodeLine{349         RSL\_IE\_NCH\_DRX\_INFO,}
\DoxyCodeLine{350         RSL\_IE\_CMD\_INDICATOR,}
\DoxyCodeLine{351         RSL\_IE\_EMLPP\_PRIO,}
\DoxyCodeLine{352         RSL\_IE\_UIC,}
\DoxyCodeLine{353         RSL\_IE\_MAIN\_CHAN\_REF,}
\DoxyCodeLine{354         RSL\_IE\_MR\_CONFIG,}
\DoxyCodeLine{355         RSL\_IE\_MR\_CONTROL,}
\DoxyCodeLine{356         RSL\_IE\_SUP\_CODEC\_TYPES,}
\DoxyCodeLine{357         RSL\_IE\_CODEC\_CONFIG,}
\DoxyCodeLine{358         RSL\_IE\_RTD,}
\DoxyCodeLine{359         RSL\_IE\_TFO\_STATUS,}
\DoxyCodeLine{360         RSL\_IE\_LLP\_APDU,}
\DoxyCodeLine{361         RSL\_IE\_TFO\_XPAR\_CONT,}
\DoxyCodeLine{362         \textcolor{comment}{/* Siemens vendor-\/specific */}}
\DoxyCodeLine{363         RSL\_IE\_SIEMENS\_MRPCI                = 0x40,}
\DoxyCodeLine{364         RSL\_IE\_SIEMENS\_PREF\_AREA\_TYPE      = 0x43,}
\DoxyCodeLine{365         RSL\_IE\_SIEMENS\_ININ\_CELL\_HO\_PAR  = 0x45,}
\DoxyCodeLine{366         RSL\_IE\_SIEMENS\_TRACE\_REF\_NR  = 0x46,}
\DoxyCodeLine{367         RSL\_IE\_SIEMENS\_INT\_TRACE\_IDX        = 0x47,}
\DoxyCodeLine{368         RSL\_IE\_SIEMENS\_L2\_HDR\_INFO    = 0x48,}
\DoxyCodeLine{369         RSL\_IE\_SIEMENS\_HIGHEST\_RATE  = 0x4e,}
\DoxyCodeLine{370         RSL\_IE\_SIEMENS\_SUGGESTED\_RATE      = 0x4f,}
\DoxyCodeLine{371 }
\DoxyCodeLine{372         \textcolor{comment}{/* Osmocom specific */}}
\DoxyCodeLine{373         RSL\_IE\_OSMO\_REP\_ACCH\_CAP        = 0x60,}
\DoxyCodeLine{374         RSL\_IE\_OSMO\_TRAINING\_SEQUENCE      = 0x61,}
\DoxyCodeLine{375         RSL\_IE\_OSMO\_TEMP\_OVP\_ACCH\_CAP      = 0x62,}
\DoxyCodeLine{376         RSL\_IE\_OSMO\_OSMUX\_CID              = 0x63,}
\DoxyCodeLine{377         RSL\_IE\_OSMO\_RTP\_EXTENSIONS    = 0x64,}
\DoxyCodeLine{378 }
\DoxyCodeLine{379         \textcolor{comment}{/* ip.access */}}
\DoxyCodeLine{380         RSL\_IE\_IPAC\_SRTP\_CONFIG  = 0xe0,}
\DoxyCodeLine{381         RSL\_IE\_IPAC\_PROXY\_UDP      = 0xe1,}
\DoxyCodeLine{382         RSL\_IE\_IPAC\_BSCMPL\_TOUT  = 0xe2,}
\DoxyCodeLine{383         RSL\_IE\_IPAC\_REMOTE\_IP      = 0xf0,}
\DoxyCodeLine{384         RSL\_IE\_IPAC\_REMOTE\_PORT  = 0xf1,}
\DoxyCodeLine{385         RSL\_IE\_IPAC\_RTP\_PAYLOAD  = 0xf2,}
\DoxyCodeLine{386         RSL\_IE\_IPAC\_LOCAL\_PORT    = 0xf3,}
\DoxyCodeLine{387         RSL\_IE\_IPAC\_SPEECH\_MODE  = 0xf4,}
\DoxyCodeLine{388         RSL\_IE\_IPAC\_LOCAL\_IP        = 0xf5,}
\DoxyCodeLine{389         RSL\_IE\_IPAC\_CONN\_STAT      = 0xf6,}
\DoxyCodeLine{390         RSL\_IE\_IPAC\_HO\_C\_PARMS    = 0xf7,}
\DoxyCodeLine{391         RSL\_IE\_IPAC\_CONN\_ID  = 0xf8,}
\DoxyCodeLine{392         RSL\_IE\_IPAC\_RTP\_CSD\_FMT  = 0xf9,}
\DoxyCodeLine{393         RSL\_IE\_IPAC\_RTP\_JIT\_BUF  = 0xfa,}
\DoxyCodeLine{394         RSL\_IE\_IPAC\_RTP\_COMPR      = 0xfb,}
\DoxyCodeLine{395         RSL\_IE\_IPAC\_RTP\_PAYLOAD2 = 0xfc,}
\DoxyCodeLine{396         RSL\_IE\_IPAC\_RTP\_MPLEX      = 0xfd,}
\DoxyCodeLine{397         RSL\_IE\_IPAC\_RTP\_MPLEX\_ID = 0xfe,}
\DoxyCodeLine{398 \};}
\DoxyCodeLine{399 }
\DoxyCodeLine{400 \textcolor{comment}{/* Ericsson specific IEs, clash with above partially, so they're not}}
\DoxyCodeLine{401 \textcolor{comment}{ * part of the enum */}}
\DoxyCodeLine{402 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_PAGING\_GROUP        0x0e}}
\DoxyCodeLine{403 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_INST\_NR             0x48}}
\DoxyCodeLine{404 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_PGSL\_TIMERS         0x49}}
\DoxyCodeLine{405 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_REPEAT\_DL\_FACCH     0x4a}}
\DoxyCodeLine{406 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_POWER\_INFO          0xf0}}
\DoxyCodeLine{407 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_MOBILE\_ID           0xf1}}
\DoxyCodeLine{408 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_BCCH\_MAPPING        0xf2}}
\DoxyCodeLine{409 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_PACKET\_PAG\_IND      0xf3}}
\DoxyCodeLine{410 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_CNTR\_CTRL           0xf4}}
\DoxyCodeLine{411 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_CNTR\_CTRL\_ACK       0xf5}}
\DoxyCodeLine{412 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_CNTR\_REPORT         0xf6}}
\DoxyCodeLine{413 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_ICP\_CONN            0xf7}}
\DoxyCodeLine{414 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_EMR\_SUPPORT         0xf8}}
\DoxyCodeLine{415 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_EGPRS\_REQ\_REF       0xf9}}
\DoxyCodeLine{416 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_VGCS\_REL            0xfa}}
\DoxyCodeLine{417 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_REP\_PER\_NCH         0xfb}}
\DoxyCodeLine{418 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_NY2                 0xfc}}
\DoxyCodeLine{419 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_T3115               0xfd}}
\DoxyCodeLine{420 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_ACTIVATE\_FLAG       0xfe}}
\DoxyCodeLine{421 \textcolor{preprocessor}{\#define RSL\_IE\_ERIC\_FULL\_NCH\_INFO       0xff}}
\DoxyCodeLine{422 }
\DoxyCodeLine{423 \textcolor{comment}{/* IPAC MEAS\_PREPROC AVERAGING METHOD */}}
\DoxyCodeLine{424 \textcolor{keyword}{enum} \{}
\DoxyCodeLine{425         IPAC\_UNWEIGHTED\_AVE = 0,}
\DoxyCodeLine{426         IPAC\_WEIGHTED\_AVE,}
\DoxyCodeLine{427         IPAC\_MEDIAN\_AVE,}
\DoxyCodeLine{428         \textcolor{comment}{/* EWMA is an Osmocom specific extension */}}
\DoxyCodeLine{429         IPAC\_OSMO\_EWMA\_AVE,}
\DoxyCodeLine{430 \};}
\DoxyCodeLine{431 }
\DoxyCodeLine{432 \textcolor{comment}{/* IPAC MEAS\_PREPROC AVERAGING PARAM ID */}}
\DoxyCodeLine{433 \textcolor{keyword}{enum} \{}
\DoxyCodeLine{434         IPAC\_RXLEV\_AVE = 0,}
\DoxyCodeLine{435         IPAC\_RXQUAL\_AVE,}
\DoxyCodeLine{436         IPAC\_MS\_BTS\_DIS\_AVE}
\DoxyCodeLine{437 \};}
\DoxyCodeLine{438 }
\DoxyCodeLine{439 \textcolor{comment}{/* IPAC MEAS\_PREPROC HO CAUSES */}}
\DoxyCodeLine{440 \textcolor{keyword}{enum} \{}
\DoxyCodeLine{441         IPAC\_HO\_RQD\_CAUSE\_L\_RXLEV\_UL\_H = 0x01,}
\DoxyCodeLine{442         IPAC\_HO\_RQD\_CAUSE\_L\_RXLEV\_DL\_H,}
\DoxyCodeLine{443         IPAC\_HO\_RQD\_CAUSE\_L\_RXQUAL\_UL\_H,}
\DoxyCodeLine{444         IPAC\_HO\_RQD\_CAUSE\_L\_RXQUAL\_DL\_H,}
\DoxyCodeLine{445         IPAC\_HO\_RQD\_CAUSE\_RXLEV\_UL\_IH,}
\DoxyCodeLine{446         IPAC\_HO\_RQD\_CAUSE\_RXLEV\_DL\_IH,}
\DoxyCodeLine{447         IPAC\_HO\_RQD\_CAUSE\_MAX\_MS\_RANGE,}
\DoxyCodeLine{448         IPAC\_HO\_RQD\_CAUSE\_POWER\_BUDGET,}
\DoxyCodeLine{449         IPAC\_HO\_RQD\_CAUSE\_ENQUIRY,}
\DoxyCodeLine{450         IPAC\_HO\_RQD\_CAUSE\_ENQUIRY\_FAILED,}
\DoxyCodeLine{451         IPAC\_HO\_RQD\_CAUSE\_NORMAL3G,}
\DoxyCodeLine{452         IPAC\_HO\_RQD\_CAUSE\_EMERGENCY3G,}
\DoxyCodeLine{453         IPAC\_HO\_RQD\_CAUSE\_SERVICE\_PREFERRED3G,}
\DoxyCodeLine{454         IPAC\_HO\_RQD\_CAUSE\_O\_M\_SHUTDOWN,}
\DoxyCodeLine{455         IPAC\_HO\_RQD\_CAUSE\_QUALITY\_PROMOTION,}
\DoxyCodeLine{456         IPAC\_HO\_RQD\_CAUSE\_LOAD\_PROMOTION,}
\DoxyCodeLine{457         IPAC\_HO\_RQD\_CAUSE\_LOAD\_DEMOTION,}
\DoxyCodeLine{458         IPAC\_HO\_RQD\_CAUSE\_MAX,}
\DoxyCodeLine{459 \};}
\DoxyCodeLine{460 }
\DoxyCodeLine{461 \textcolor{comment}{/* Chapter 9.3.1 */}}
\DoxyCodeLine{462 \textcolor{preprocessor}{\#define RSL\_CHAN\_NR\_MASK        0xf8}}
\DoxyCodeLine{463 \textcolor{preprocessor}{\#define RSL\_CHAN\_NR\_1           0x08    }\textcolor{comment}{/*< bit to add for 2nd,... lchan */}\textcolor{preprocessor}{}}
\DoxyCodeLine{464 \textcolor{preprocessor}{\#define RSL\_CHAN\_Bm\_ACCHs       0x08}}
\DoxyCodeLine{465 \textcolor{preprocessor}{\#define RSL\_CHAN\_Lm\_ACCHs       0x10    }\textcolor{comment}{/* .. 0x18 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{466 \textcolor{preprocessor}{\#define RSL\_CHAN\_SDCCH4\_ACCH    0x20    }\textcolor{comment}{/* .. 0x38 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{467 \textcolor{preprocessor}{\#define RSL\_CHAN\_SDCCH8\_ACCH    0x40    }\textcolor{comment}{/* ...0x78 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{468 \textcolor{preprocessor}{\#define RSL\_CHAN\_BCCH           0x80}}
\DoxyCodeLine{469 \textcolor{preprocessor}{\#define RSL\_CHAN\_RACH           0x88}}
\DoxyCodeLine{470 \textcolor{preprocessor}{\#define RSL\_CHAN\_PCH\_AGCH       0x90}}
\DoxyCodeLine{471 \textcolor{preprocessor}{\#define RSL\_CHAN\_OSMO\_PDCH      0xc0    }\textcolor{comment}{/*< non-\/standard, for dyn TS */}\textcolor{preprocessor}{}}
\DoxyCodeLine{472 \textcolor{preprocessor}{\#define RSL\_CHAN\_OSMO\_CBCH4     0xc8    }\textcolor{comment}{/*< non-\/standard, for CBCH/SDCCH4 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{473 \textcolor{preprocessor}{\#define RSL\_CHAN\_OSMO\_CBCH8     0xd0    }\textcolor{comment}{/*< non-\/standard, for CBCH/SDCCH8 */}\textcolor{preprocessor}{}}
\DoxyCodeLine{474 }
\DoxyCodeLine{475 \textcolor{comment}{/* non-\/standard, Osmocom specific Bm/Lm equivalents for VAMOS */}}
\DoxyCodeLine{476 \textcolor{preprocessor}{\#define RSL\_CHAN\_OSMO\_VAMOS\_Bm\_ACCHs    0xe8    }\textcolor{comment}{/* VAMOS TCH/F */}\textcolor{preprocessor}{}}
\DoxyCodeLine{477 \textcolor{preprocessor}{\#define RSL\_CHAN\_OSMO\_VAMOS\_Lm\_ACCHs    0xf0    }\textcolor{comment}{/* VAMOS TCH/H */}\textcolor{preprocessor}{}}
\DoxyCodeLine{478 \textcolor{preprocessor}{\#define RSL\_CHAN\_OSMO\_VAMOS\_MASK        0xe0    }\textcolor{comment}{/* VAMOS TCH/\{F,H\} */}\textcolor{preprocessor}{}}
\DoxyCodeLine{479 }
\DoxyCodeLine{480 \textcolor{comment}{/* Chapter 9.3.3 */}}
\DoxyCodeLine{481 \textcolor{preprocessor}{\#define RSL\_ACT\_TYPE\_INITIAL    0x00}}
\DoxyCodeLine{482 \textcolor{preprocessor}{\#define RSL\_ACT\_TYPE\_REACT      0x80}}
\DoxyCodeLine{483 \textcolor{preprocessor}{\#define RSL\_ACT\_INTRA\_IMM\_ASS   0x00}}
\DoxyCodeLine{484 \textcolor{preprocessor}{\#define RSL\_ACT\_INTRA\_NORM\_ASS  0x01}}
\DoxyCodeLine{485 \textcolor{preprocessor}{\#define RSL\_ACT\_INTER\_ASYNC     0x02}}
\DoxyCodeLine{486 \textcolor{preprocessor}{\#define RSL\_ACT\_INTER\_SYNC      0x03}}
\DoxyCodeLine{487 \textcolor{preprocessor}{\#define RSL\_ACT\_SECOND\_ADD      0x04}}
\DoxyCodeLine{488 \textcolor{preprocessor}{\#define RSL\_ACT\_SECOND\_MULTI    0x05}}
\DoxyCodeLine{489 \textcolor{preprocessor}{\#define RSL\_ACT\_OSMO\_PDCH       0x0f    }\textcolor{comment}{/*< non-\/standard, for dyn TS */}\textcolor{preprocessor}{}}
\DoxyCodeLine{490 }
\DoxyCodeLine{492 \textcolor{keyword}{struct }rsl\_ie\_chan\_mode \{}
\DoxyCodeLine{493         uint8\_t dtx\_dtu;}
\DoxyCodeLine{494         uint8\_t spd\_ind;}
\DoxyCodeLine{495         uint8\_t chan\_rt;}
\DoxyCodeLine{496         uint8\_t chan\_rate;}
\DoxyCodeLine{497 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{498 \textcolor{preprocessor}{\#define RSL\_CMOD\_DTXu           0x01    }\textcolor{comment}{/* uplink */}\textcolor{preprocessor}{}}
\DoxyCodeLine{499 \textcolor{preprocessor}{\#define RSL\_CMOD\_DTXd           0x02    }\textcolor{comment}{/* downlink */}\textcolor{preprocessor}{}}
\DoxyCodeLine{500 \textcolor{keyword}{enum} rsl\_cmod\_spd \{}
\DoxyCodeLine{501         RSL\_CMOD\_SPD\_SPEECH  = 0x01,}
\DoxyCodeLine{502         RSL\_CMOD\_SPD\_DATA      = 0x02,}
\DoxyCodeLine{503         RSL\_CMOD\_SPD\_SIGN      = 0x03,}
\DoxyCodeLine{504 \};}
\DoxyCodeLine{506 \textcolor{keyword}{enum} rsl\_cmod\_crt \{}
\DoxyCodeLine{507         RSL\_CMOD\_CRT\_SDCCH            = 0x01,}
\DoxyCodeLine{508         RSL\_CMOD\_CRT\_TCH\_Bm          = 0x08, \textcolor{comment}{/* full-\/rate */}}
\DoxyCodeLine{509         RSL\_CMOD\_CRT\_TCH\_Lm          = 0x09, \textcolor{comment}{/* half-\/rate */}}
\DoxyCodeLine{510         RSL\_CMOD\_CRT\_TCH\_BI\_Bm            = 0x0a, \textcolor{comment}{/* full-\/rate: bi-\/directional (multislot) */}}
\DoxyCodeLine{511         RSL\_CMOD\_CRT\_TCH\_UNI\_Bm          = 0x1a, \textcolor{comment}{/* full-\/rate: uni-\/directional (multislot) */}}
\DoxyCodeLine{512         RSL\_CMOD\_CRT\_TCH\_GROUP\_Bm      = 0x18, \textcolor{comment}{/* full-\/rate: group call channel */}}
\DoxyCodeLine{513         RSL\_CMOD\_CRT\_TCH\_GROUP\_Lm      = 0x19, \textcolor{comment}{/* half-\/rate: group call channel */}}
\DoxyCodeLine{514         RSL\_CMOD\_CRT\_TCH\_BCAST\_Bm      = 0x28, \textcolor{comment}{/* full-\/rate: broadcast call channel */}}
\DoxyCodeLine{515         RSL\_CMOD\_CRT\_TCH\_BCAST\_Lm      = 0x29, \textcolor{comment}{/* half-\/rate: broadcast call channel */}}
\DoxyCodeLine{516         RSL\_CMOD\_CRT\_OSMO\_TCH\_VAMOS\_Bm    = 0x88, \textcolor{comment}{/* full-\/rate in VAMOS mode */}}
\DoxyCodeLine{517         RSL\_CMOD\_CRT\_OSMO\_TCH\_VAMOS\_Lm    = 0x89, \textcolor{comment}{/* half-\/rate in VAMOS mode */}}
\DoxyCodeLine{518 \};}
\DoxyCodeLine{520 \textcolor{keyword}{enum} rsl\_cmod\_sp \{}
\DoxyCodeLine{521         RSL\_CMOD\_SP\_GSM1        = 0x01,}
\DoxyCodeLine{522         RSL\_CMOD\_SP\_GSM2        = 0x11,}
\DoxyCodeLine{523         RSL\_CMOD\_SP\_GSM3        = 0x21,}
\DoxyCodeLine{524         RSL\_CMOD\_SP\_GSM4        = 0x31,}
\DoxyCodeLine{525         RSL\_CMOD\_SP\_GSM5        = 0x09,}
\DoxyCodeLine{526         RSL\_CMOD\_SP\_GSM6        = 0x0d,}
\DoxyCodeLine{527 \};}
\DoxyCodeLine{529 \textcolor{keyword}{enum} rsl\_cmod\_csd\_nt \{}
\DoxyCodeLine{530         RSL\_CMOD\_CSD\_NTA\_43k5\_14k5    = 0x61, \textcolor{comment}{/* asymmetric 43.5 kbit/s (DL) + 14.5 kbit/s (UL) */}}
\DoxyCodeLine{531         RSL\_CMOD\_CSD\_NTA\_29k0\_14k5    = 0x62, \textcolor{comment}{/* asymmetric 29.0 kbit/s (DL) + 14.5 kbit/s (UL) */}}
\DoxyCodeLine{532         RSL\_CMOD\_CSD\_NTA\_43k5\_29k0    = 0x63, \textcolor{comment}{/* asymmetric 43.5 kbit/s (DL) + 29.0 kbit/s (UL) */}}
\DoxyCodeLine{533         RSL\_CMOD\_CSD\_NTA\_14k5\_43k5    = 0x69, \textcolor{comment}{/* asymmetric 14.5 kbit/s (DL) + 43.5 kbit/s (UL) */}}
\DoxyCodeLine{534         RSL\_CMOD\_CSD\_NTA\_14k5\_29k0    = 0x6a, \textcolor{comment}{/* asymmetric 14.5 kbit/s (DL) + 29.0 kbit/s (UL) */}}
\DoxyCodeLine{535         RSL\_CMOD\_CSD\_NTA\_29k0\_43k5    = 0x6b, \textcolor{comment}{/* asymmetric 29.0 kbit/s (DL) + 43.5 kbit/s (UL) */}}
\DoxyCodeLine{536         RSL\_CMOD\_CSD\_NT\_43k5                = 0x74,}
\DoxyCodeLine{537         RSL\_CMOD\_CSD\_NT\_28k8                = 0x71,}
\DoxyCodeLine{538         RSL\_CMOD\_CSD\_NT\_14k5                = 0x58,}
\DoxyCodeLine{539         RSL\_CMOD\_CSD\_NT\_12k0                = 0x50,}
\DoxyCodeLine{540         RSL\_CMOD\_CSD\_NT\_6k0          = 0x51,}
\DoxyCodeLine{541 \};}
\DoxyCodeLine{542 \textcolor{comment}{/* legacy \#defines with wrong name */}}
\DoxyCodeLine{543 \textcolor{preprocessor}{\#define RSL\_CMOD\_SP\_NT\_14k5     RSL\_CMOD\_CSD\_NT\_14k5}}
\DoxyCodeLine{544 \textcolor{preprocessor}{\#define RSL\_CMOD\_SP\_NT\_12k0     RSL\_CMOD\_CSD\_NT\_12k0}}
\DoxyCodeLine{545 \textcolor{preprocessor}{\#define RSL\_CMOD\_SP\_NT\_6k0      RSL\_CMOD\_CSD\_NT\_6k0}}
\DoxyCodeLine{546 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_32000    RSL\_CMOD\_CSD\_T\_32k0}}
\DoxyCodeLine{547 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_29000    RSL\_CMOD\_CSD\_T\_29k0}}
\DoxyCodeLine{548 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_14400    RSL\_CMOD\_CSD\_T\_14k4}}
\DoxyCodeLine{549 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_9600     RSL\_CMOD\_CSD\_T\_9k6}}
\DoxyCodeLine{550 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_4800     RSL\_CMOD\_CSD\_T\_4k8}}
\DoxyCodeLine{551 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_2400     RSL\_CMOD\_CSD\_T\_2k4}}
\DoxyCodeLine{552 \textcolor{preprocessor}{\#define RSL\_CMOD\_CSD\_T\_1200     RSL\_CMOD\_CSD\_T\_1k2}}
\DoxyCodeLine{554 \textcolor{keyword}{enum} rsl\_cmod\_csd\_t \{}
\DoxyCodeLine{555         RSL\_CMOD\_CSD\_T\_32k0  = 0x38,}
\DoxyCodeLine{556         RSL\_CMOD\_CSD\_T\_29k0  = 0x39,}
\DoxyCodeLine{557         RSL\_CMOD\_CSD\_T\_14k4  = 0x18,}
\DoxyCodeLine{558         RSL\_CMOD\_CSD\_T\_9k6    = 0x10,}
\DoxyCodeLine{559         RSL\_CMOD\_CSD\_T\_4k8    = 0x11,}
\DoxyCodeLine{560         RSL\_CMOD\_CSD\_T\_2k4    = 0x12,}
\DoxyCodeLine{561         RSL\_CMOD\_CSD\_T\_1k2    = 0x13,}
\DoxyCodeLine{562         RSL\_CMOD\_CSD\_T\_600    = 0x14,}
\DoxyCodeLine{563         RSL\_CMOD\_CSD\_T\_1200\_75    = 0x15,}
\DoxyCodeLine{564 \};}
\DoxyCodeLine{565 }
\DoxyCodeLine{567 \textcolor{keyword}{struct }rsl\_ie\_chan\_ident \{}
\DoxyCodeLine{568         \textcolor{comment}{/* GSM 04.08 10.5.2.5 */}}
\DoxyCodeLine{569         \textcolor{keyword}{struct }\{}
\DoxyCodeLine{570                 uint8\_t iei;}
\DoxyCodeLine{571                 uint8\_t chan\_nr; \textcolor{comment}{/* enc\_chan\_nr */}}
\DoxyCodeLine{572                 uint8\_t oct3;}
\DoxyCodeLine{573                 uint8\_t oct4;}
\DoxyCodeLine{574         \} chan\_desc;}
\DoxyCodeLine{575 \textcolor{preprocessor}{\#if 0   }\textcolor{comment}{/* spec says we need this but Abissim doesn't use it */}\textcolor{preprocessor}{}}
\DoxyCodeLine{576         \textcolor{keyword}{struct }\{}
\DoxyCodeLine{577                 uint8\_t tag;}
\DoxyCodeLine{578                 uint8\_t len;}
\DoxyCodeLine{579         \} mobile\_alloc;}
\DoxyCodeLine{580 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{581 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{582 }
\DoxyCodeLine{583 \textcolor{comment}{/* Chapter 9.3.22 */}}
\DoxyCodeLine{584 \textcolor{preprocessor}{\#define RLL\_CAUSE\_T200\_EXPIRED          0x01}}
\DoxyCodeLine{585 \textcolor{preprocessor}{\#define RLL\_CAUSE\_REEST\_REQ             0x02}}
\DoxyCodeLine{586 \textcolor{preprocessor}{\#define RLL\_CAUSE\_UNSOL\_UA\_RESP         0x03}}
\DoxyCodeLine{587 \textcolor{preprocessor}{\#define RLL\_CAUSE\_UNSOL\_DM\_RESP         0x04}}
\DoxyCodeLine{588 \textcolor{preprocessor}{\#define RLL\_CAUSE\_UNSOL\_DM\_RESP\_MF      0x05}}
\DoxyCodeLine{589 \textcolor{preprocessor}{\#define RLL\_CAUSE\_UNSOL\_SPRV\_RESP       0x06}}
\DoxyCodeLine{590 \textcolor{preprocessor}{\#define RLL\_CAUSE\_SEQ\_ERR               0x07}}
\DoxyCodeLine{591 \textcolor{preprocessor}{\#define RLL\_CAUSE\_UFRM\_INC\_PARAM        0x08}}
\DoxyCodeLine{592 \textcolor{preprocessor}{\#define RLL\_CAUSE\_SFRM\_INC\_PARAM        0x09}}
\DoxyCodeLine{593 \textcolor{preprocessor}{\#define RLL\_CAUSE\_IFRM\_INC\_MBITS        0x0a}}
\DoxyCodeLine{594 \textcolor{preprocessor}{\#define RLL\_CAUSE\_IFRM\_INC\_LEN          0x0b}}
\DoxyCodeLine{595 \textcolor{preprocessor}{\#define RLL\_CAUSE\_FRM\_UNIMPL            0x0c}}
\DoxyCodeLine{596 \textcolor{preprocessor}{\#define RLL\_CAUSE\_SABM\_MF               0x0d}}
\DoxyCodeLine{597 \textcolor{preprocessor}{\#define RLL\_CAUSE\_SABM\_INFO\_NOTALL      0x0e}}
\DoxyCodeLine{598 }
\DoxyCodeLine{599 \textcolor{comment}{/* Chapter 9.3.26 */}}
\DoxyCodeLine{600 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_NORMAL               0x00}}
\DoxyCodeLine{601 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_RESOURCE\_UNAVAIL     0x20}}
\DoxyCodeLine{602 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_SERVICE\_UNAVAIL      0x30}}
\DoxyCodeLine{603 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_SERVICE\_UNIMPL       0x40}}
\DoxyCodeLine{604 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_INVAL\_MSG            0x50}}
\DoxyCodeLine{605 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_PROTO\_ERROR          0x60}}
\DoxyCodeLine{606 \textcolor{preprocessor}{\#define RSL\_ERRCLS\_INTERWORKING         0x70}}
\DoxyCodeLine{607 }
\DoxyCodeLine{608 \textcolor{comment}{/* normal event */}}
\DoxyCodeLine{609 \textcolor{preprocessor}{\#define RSL\_ERR\_RADIO\_IF\_FAIL           0x00}}
\DoxyCodeLine{610 \textcolor{preprocessor}{\#define RSL\_ERR\_RADIO\_LINK\_FAIL         0x01}}
\DoxyCodeLine{611 \textcolor{preprocessor}{\#define RSL\_ERR\_HANDOVER\_ACC\_FAIL       0x02}}
\DoxyCodeLine{612 \textcolor{preprocessor}{\#define RSL\_ERR\_TALKER\_ACC\_FAIL         0x03}}
\DoxyCodeLine{613 \textcolor{preprocessor}{\#define RSL\_ERR\_OM\_INTERVENTION         0x07}}
\DoxyCodeLine{614 \textcolor{preprocessor}{\#define RSL\_ERR\_NORMAL\_UNSPEC           0x0f}}
\DoxyCodeLine{615 \textcolor{preprocessor}{\#define RSL\_ERR\_T\_MSRFPCI\_EXP           0x18}}
\DoxyCodeLine{616 \textcolor{comment}{/* resource unavailable */}}
\DoxyCodeLine{617 \textcolor{preprocessor}{\#define RSL\_ERR\_EQUIPMENT\_FAIL          0x20}}
\DoxyCodeLine{618 \textcolor{preprocessor}{\#define RSL\_ERR\_RR\_UNAVAIL              0x21}}
\DoxyCodeLine{619 \textcolor{preprocessor}{\#define RSL\_ERR\_TERR\_CH\_FAIL            0x22}}
\DoxyCodeLine{620 \textcolor{preprocessor}{\#define RSL\_ERR\_CCCH\_OVERLOAD           0x23}}
\DoxyCodeLine{621 \textcolor{preprocessor}{\#define RSL\_ERR\_ACCH\_OVERLOAD           0x24}}
\DoxyCodeLine{622 \textcolor{preprocessor}{\#define RSL\_ERR\_PROCESSOR\_OVERLOAD      0x25}}
\DoxyCodeLine{623 \textcolor{preprocessor}{\#define RSL\_ERR\_BTS\_NOT\_EQUIPPED        0x27}}
\DoxyCodeLine{624 \textcolor{preprocessor}{\#define RSL\_ERR\_REMOTE\_TRANSC\_FAIL      0x28}}
\DoxyCodeLine{625 \textcolor{preprocessor}{\#define RSL\_ERR\_NOTIFICATION\_OVERFL     0x29}}
\DoxyCodeLine{626 \textcolor{preprocessor}{\#define RSL\_ERR\_RES\_UNAVAIL             0x2f}}
\DoxyCodeLine{627 \textcolor{comment}{/* service or option not available */}}
\DoxyCodeLine{628 \textcolor{preprocessor}{\#define RSL\_ERR\_TRANSC\_UNAVAIL          0x30}}
\DoxyCodeLine{629 \textcolor{preprocessor}{\#define RSL\_ERR\_SERV\_OPT\_UNAVAIL        0x3f}}
\DoxyCodeLine{630 \textcolor{comment}{/* service or option not implemented */}}
\DoxyCodeLine{631 \textcolor{preprocessor}{\#define RSL\_ERR\_ENCR\_UNIMPL             0x40}}
\DoxyCodeLine{632 \textcolor{preprocessor}{\#define RSL\_ERR\_SERV\_OPT\_UNIMPL         0x4f}}
\DoxyCodeLine{633 \textcolor{comment}{/* invalid message */}}
\DoxyCodeLine{634 \textcolor{preprocessor}{\#define RSL\_ERR\_RCH\_ALR\_ACTV\_ALLOC      0x50}}
\DoxyCodeLine{635 \textcolor{preprocessor}{\#define RSL\_ERR\_INVALID\_MESSAGE         0x5f}}
\DoxyCodeLine{636 \textcolor{comment}{/* protocol error */}}
\DoxyCodeLine{637 \textcolor{preprocessor}{\#define RSL\_ERR\_MSG\_DISCR               0x60}}
\DoxyCodeLine{638 \textcolor{preprocessor}{\#define RSL\_ERR\_MSG\_TYPE                0x61}}
\DoxyCodeLine{639 \textcolor{preprocessor}{\#define RSL\_ERR\_MSG\_SEQ                 0x62}}
\DoxyCodeLine{640 \textcolor{preprocessor}{\#define RSL\_ERR\_IE\_ERROR                0x63}}
\DoxyCodeLine{641 \textcolor{preprocessor}{\#define RSL\_ERR\_MAND\_IE\_ERROR           0x64}}
\DoxyCodeLine{642 \textcolor{preprocessor}{\#define RSL\_ERR\_OPT\_IE\_ERROR            0x65}}
\DoxyCodeLine{643 \textcolor{preprocessor}{\#define RSL\_ERR\_IE\_NONEXIST             0x66}}
\DoxyCodeLine{644 \textcolor{preprocessor}{\#define RSL\_ERR\_IE\_LENGTH               0x67}}
\DoxyCodeLine{645 \textcolor{preprocessor}{\#define RSL\_ERR\_IE\_CONTENT              0x68}}
\DoxyCodeLine{646 \textcolor{preprocessor}{\#define RSL\_ERR\_PROTO                   0x6f}}
\DoxyCodeLine{647 \textcolor{comment}{/* interworking */}}
\DoxyCodeLine{648 \textcolor{preprocessor}{\#define RSL\_ERR\_INTERWORKING            0x7f}}
\DoxyCodeLine{649 }
\DoxyCodeLine{650 \textcolor{comment}{/* Chapter 9.3.30 */}}
\DoxyCodeLine{651 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_8       0x00}}
\DoxyCodeLine{652 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_1       0x01}}
\DoxyCodeLine{653 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_2       0x02}}
\DoxyCodeLine{654 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_3       0x03}}
\DoxyCodeLine{655 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_4       0x04}}
\DoxyCodeLine{656 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_5       0x05}}
\DoxyCodeLine{657 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_6       0x06}}
\DoxyCodeLine{658 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_7       0x07}}
\DoxyCodeLine{659 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_16      0x08}}
\DoxyCodeLine{660 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_17      0x09}}
\DoxyCodeLine{661 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_2bis    0x0a}}
\DoxyCodeLine{662 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_2ter    0x0b}}
\DoxyCodeLine{663 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_5bis    0x0d}}
\DoxyCodeLine{664 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_5ter    0x0e}}
\DoxyCodeLine{665 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_10      0x0f}}
\DoxyCodeLine{666 \textcolor{preprocessor}{\#define RSL\_EXT\_MEAS\_ORDER      0x47}}
\DoxyCodeLine{667 \textcolor{preprocessor}{\#define RSL\_MEAS\_INFO           0x48}}
\DoxyCodeLine{668 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_13      0x28}}
\DoxyCodeLine{669 \textcolor{preprocessor}{\#define RSL\_ERIC\_SYSTEM\_INFO\_13 0x0C}}
\DoxyCodeLine{670 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_2quater 0x29}}
\DoxyCodeLine{671 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_9       0x2a}}
\DoxyCodeLine{672 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_18      0x2b}}
\DoxyCodeLine{673 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_19      0x2c}}
\DoxyCodeLine{674 \textcolor{preprocessor}{\#define RSL\_SYSTEM\_INFO\_20      0x2d}}
\DoxyCodeLine{675 }
\DoxyCodeLine{676 \textcolor{comment}{/* Chapter 9.3.40 */}}
\DoxyCodeLine{677 \textcolor{preprocessor}{\#define RSL\_CHANNEED\_ANY        0x00}}
\DoxyCodeLine{678 \textcolor{preprocessor}{\#define RSL\_CHANNEED\_SDCCH      0x01}}
\DoxyCodeLine{679 \textcolor{preprocessor}{\#define RSL\_CHANNEED\_TCH\_F      0x02}}
\DoxyCodeLine{680 \textcolor{preprocessor}{\#define RSL\_CHANNEED\_TCH\_ForH   0x03}}
\DoxyCodeLine{681 }
\DoxyCodeLine{683 \textcolor{keyword}{struct }rsl\_ie\_cb\_cmd\_type \{}
\DoxyCodeLine{684 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{685         uint8\_t last\_block:2;}
\DoxyCodeLine{686         uint8\_t spare:1;}
\DoxyCodeLine{687         uint8\_t def\_bcast:1;}
\DoxyCodeLine{688         uint8\_t command:4;}
\DoxyCodeLine{689 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{690 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{691         uint8\_t command:4, def\_bcast:1, spare:1, last\_block:2;}
\DoxyCodeLine{692 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{693 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{694 \textcolor{comment}{/* -\/>command */}}
\DoxyCodeLine{695 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_TYPE\_NORMAL          0x00}}
\DoxyCodeLine{696 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_TYPE\_SCHEDULE        0x08}}
\DoxyCodeLine{697 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_TYPE\_DEFAULT         0x0e}}
\DoxyCodeLine{698 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_TYPE\_NULL            0x0f}}
\DoxyCodeLine{699 \textcolor{comment}{/* -\/>def\_bcast */}}
\DoxyCodeLine{700 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_DEFBCAST\_NORMAL      0}}
\DoxyCodeLine{701 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_DEFBCAST\_NULL        1}}
\DoxyCodeLine{702 \textcolor{comment}{/* -\/>last\_block */}}
\DoxyCodeLine{703 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_LASTBLOCK\_4          0}}
\DoxyCodeLine{704 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_LASTBLOCK\_1          1}}
\DoxyCodeLine{705 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_LASTBLOCK\_2          2}}
\DoxyCodeLine{706 \textcolor{preprocessor}{\#define RSL\_CB\_CMD\_LASTBLOCK\_3          3}}
\DoxyCodeLine{707 }
\DoxyCodeLine{709 \textcolor{keyword}{struct }rsl\_ie\_nch\_drx\_info \{}
\DoxyCodeLine{710 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{711         uint8\_t nln:2;}
\DoxyCodeLine{712         uint8\_t emlpp\_priority:3;}
\DoxyCodeLine{713         uint8\_t nln\_status:1;}
\DoxyCodeLine{714         uint8\_t spare:2;}
\DoxyCodeLine{715 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{716 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{717         uint8\_t spare:2, nln\_status:1, emlpp\_priority:3, nln:2;}
\DoxyCodeLine{718 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{719 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{720 }
\DoxyCodeLine{722 \textcolor{preprocessor}{\#define RSL\_CMD\_INDICATOR\_START 0x00}}
\DoxyCodeLine{723 \textcolor{preprocessor}{\#define RSL\_CMD\_INDICATOR\_STOP  0x01}}
\DoxyCodeLine{724 }
\DoxyCodeLine{725 \textcolor{comment}{/* Chapter 3.3.2.3 Brocast control channel */}}
\DoxyCodeLine{726 \textcolor{comment}{/* CCCH-\/CONF, NC is not combined */}}
\DoxyCodeLine{727 \textcolor{preprocessor}{\#define RSL\_BCCH\_CCCH\_CONF\_1\_NC 0x00}}
\DoxyCodeLine{728 \textcolor{preprocessor}{\#define RSL\_BCCH\_CCCH\_CONF\_1\_C  0x01}}
\DoxyCodeLine{729 \textcolor{preprocessor}{\#define RSL\_BCCH\_CCCH\_CONF\_2\_NC 0x02}}
\DoxyCodeLine{730 \textcolor{preprocessor}{\#define RSL\_BCCH\_CCCH\_CONF\_3\_NC 0x04}}
\DoxyCodeLine{731 \textcolor{preprocessor}{\#define RSL\_BCCH\_CCCH\_CONF\_4\_NC 0x06}}
\DoxyCodeLine{732 }
\DoxyCodeLine{733 \textcolor{comment}{/* BS-\/PA-\/MFRMS */}}
\DoxyCodeLine{734 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_2       0x00}}
\DoxyCodeLine{735 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_3       0x01}}
\DoxyCodeLine{736 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_4       0x02}}
\DoxyCodeLine{737 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_5       0x03}}
\DoxyCodeLine{738 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_6       0x04}}
\DoxyCodeLine{739 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_7       0x05}}
\DoxyCodeLine{740 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_8       0x06}}
\DoxyCodeLine{741 \textcolor{preprocessor}{\#define RSL\_BS\_PA\_MFRMS\_9       0x07}}
\DoxyCodeLine{742 }
\DoxyCodeLine{743 \textcolor{comment}{/* RSL\_IE\_IPAC\_RTP\_PAYLOAD[2] */}}
\DoxyCodeLine{744 \textcolor{keyword}{enum} rsl\_ipac\_rtp\_payload \{}
\DoxyCodeLine{745         RSL\_IPAC\_RTP\_GSM        = 1,}
\DoxyCodeLine{746         RSL\_IPAC\_RTP\_EFR,}
\DoxyCodeLine{747         RSL\_IPAC\_RTP\_AMR,}
\DoxyCodeLine{748         RSL\_IPAC\_RTP\_CSD,}
\DoxyCodeLine{749         RSL\_IPAC\_RTP\_MUX,}
\DoxyCodeLine{750 \};}
\DoxyCodeLine{751 }
\DoxyCodeLine{752 \textcolor{comment}{/* RSL\_IE\_IPAC\_SPEECH\_MODE, lower four bits */}}
\DoxyCodeLine{753 \textcolor{keyword}{enum} rsl\_ipac\_speech\_mode\_s \{}
\DoxyCodeLine{754         RSL\_IPAC\_SPEECH\_GSM\_FR = 0,       \textcolor{comment}{/* GSM FR (Type 1, FS) */}}
\DoxyCodeLine{755         RSL\_IPAC\_SPEECH\_GSM\_EFR = 1,     \textcolor{comment}{/* GSM EFR (Type 2, FS) */}}
\DoxyCodeLine{756         RSL\_IPAC\_SPEECH\_GSM\_AMR\_FR = 2,       \textcolor{comment}{/* GSM AMR/FR (Type 3, FS) */}}
\DoxyCodeLine{757         RSL\_IPAC\_SPEECH\_GSM\_HR = 3,       \textcolor{comment}{/* GSM HR (Type 1, HS) */}}
\DoxyCodeLine{758         RSL\_IPAC\_SPEECH\_GSM\_AMR\_HR = 5,       \textcolor{comment}{/* GSM AMR/hr (Type 3, HS) */}}
\DoxyCodeLine{759         RSL\_IPAC\_SPEECH\_AS\_RTP = 0xf,     \textcolor{comment}{/* As specified by RTP Payload IE */}}
\DoxyCodeLine{760 \};}
\DoxyCodeLine{761 \textcolor{comment}{/* RSL\_IE\_IPAC\_SPEECH\_MODE, upper four bits */}}
\DoxyCodeLine{762 \textcolor{keyword}{enum} rsl\_ipac\_speech\_mode\_m \{}
\DoxyCodeLine{763         RSL\_IPAC\_SPEECH\_M\_RXTX = 0,       \textcolor{comment}{/* Send and Receive */}}
\DoxyCodeLine{764         RSL\_IPAC\_SPEECH\_M\_RX = 1,   \textcolor{comment}{/* Receive only */}}
\DoxyCodeLine{765         RSL\_IPAC\_SPEECH\_M\_TX = 2,   \textcolor{comment}{/* Send only */}}
\DoxyCodeLine{766 \};}
\DoxyCodeLine{767 }
\DoxyCodeLine{768 \textcolor{comment}{/* RSL\_IE\_IPAC\_RTP\_CSD\_FMT, lower four bits */}}
\DoxyCodeLine{769 \textcolor{keyword}{enum} rsl\_ipac\_rtp\_csd\_format\_d \{}
\DoxyCodeLine{770         RSL\_IPAC\_RTP\_CSD\_EXT\_TRAU = 0, }
\DoxyCodeLine{771         RSL\_IPAC\_RTP\_CSD\_NON\_TRAU = 1, }
\DoxyCodeLine{772         RSL\_IPAC\_RTP\_CSD\_TRAU\_BTS = 2, }
\DoxyCodeLine{773         RSL\_IPAC\_RTP\_CSD\_IWF\_FREE = 3, }
\DoxyCodeLine{774 \};}
\DoxyCodeLine{775 \textcolor{comment}{/* RSL\_IE\_IPAC\_RTP\_CSD\_FMT, upper four bits */}}
\DoxyCodeLine{776 \textcolor{keyword}{enum} rsl\_ipac\_rtp\_csd\_format\_ir \{}
\DoxyCodeLine{777         RSL\_IPAC\_RTP\_CSD\_IR\_8k = 0,}
\DoxyCodeLine{778         RSL\_IPAC\_RTP\_CSD\_IR\_16k = 1,}
\DoxyCodeLine{779         RSL\_IPAC\_RTP\_CSD\_IR\_32k = 2,}
\DoxyCodeLine{780         RSL\_IPAC\_RTP\_CSD\_IR\_64k = 3,}
\DoxyCodeLine{781 \};}
\DoxyCodeLine{782 }
\DoxyCodeLine{783 \textcolor{comment}{/* Siemens vendor-\/specific RSL extensions */}}
\DoxyCodeLine{784 \textcolor{keyword}{struct }rsl\_mrpci \{}
\DoxyCodeLine{785         uint8\_t power\_class:3,}
\DoxyCodeLine{786                  vgcs\_capable:1,}
\DoxyCodeLine{787                  vbs\_capable:1,}
\DoxyCodeLine{788                  gsm\_phase:2;}
\DoxyCodeLine{789 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{790 }
\DoxyCodeLine{791 \textcolor{keyword}{enum} rsl\_mrpci\_pwrclass \{}
\DoxyCodeLine{792         RSL\_MRPCI\_PWRC\_1        = 0,}
\DoxyCodeLine{793         RSL\_MRPCI\_PWRC\_2        = 1,}
\DoxyCodeLine{794         RSL\_MRPCI\_PWRC\_3        = 2,}
\DoxyCodeLine{795         RSL\_MRPCI\_PWRC\_4        = 3,}
\DoxyCodeLine{796         RSL\_MRPCI\_PWRC\_5        = 4,}
\DoxyCodeLine{797 \};}
\DoxyCodeLine{798 \textcolor{keyword}{enum} rsl\_mrpci\_phase \{}
\DoxyCodeLine{799         RSL\_MRPCI\_PHASE\_1      = 0,}
\DoxyCodeLine{800         \textcolor{comment}{/* reserved */}}
\DoxyCodeLine{801         RSL\_MRPCI\_PHASE\_2      = 2,}
\DoxyCodeLine{802         RSL\_MRPCI\_PHASE\_2PLUS      = 3,}
\DoxyCodeLine{803 \};}
\DoxyCodeLine{804 }
\DoxyCodeLine{805 \textcolor{comment}{/* 9.3.20 Release Mode */}}
\DoxyCodeLine{806 \textcolor{keyword}{enum} rsl\_rel\_mode \{}
\DoxyCodeLine{807         RSL\_REL\_NORMAL            = 0,}
\DoxyCodeLine{808         RSL\_REL\_LOCAL\_END      = 1,}
\DoxyCodeLine{809 \};}
\DoxyCodeLine{810 }
\DoxyCodeLine{812 \textcolor{keyword}{enum} rsl\_ipac\_embedded\_ie \{}
\DoxyCodeLine{813         RSL\_IPAC\_EIE\_RXLEV            = 0x00,}
\DoxyCodeLine{814         RSL\_IPAC\_EIE\_RXQUAL          = 0x01,}
\DoxyCodeLine{815         RSL\_IPAC\_EIE\_FREQ\_ERR              = 0x02,}
\DoxyCodeLine{816         RSL\_IPAC\_EIE\_TIMING\_ERR          = 0x03,}
\DoxyCodeLine{817         RSL\_IPAC\_EIE\_MEAS\_AVG\_CFG      = 0x04,}
\DoxyCodeLine{818         RSL\_IPAC\_EIE\_BS\_PWR\_CTL          = 0x05,}
\DoxyCodeLine{819         RSL\_IPAC\_EIE\_MS\_PWR\_CTL          = 0x06,}
\DoxyCodeLine{820         RSL\_IPAC\_EIE\_HANDO\_THRESH      = 0x07,}
\DoxyCodeLine{821         RSL\_IPAC\_EIE\_NCELL\_DEFAULTS  = 0x08,}
\DoxyCodeLine{822         RSL\_IPAC\_EIE\_NCELL\_LIST          = 0x09,}
\DoxyCodeLine{823         RSL\_IPAC\_EIE\_PC\_THRESH\_COMP  = 0x0a,}
\DoxyCodeLine{824         RSL\_IPAC\_EIE\_HO\_THRESH\_COMP  = 0x0b,}
\DoxyCodeLine{825         RSL\_IPAC\_EIE\_HO\_CAUSE              = 0x0c,}
\DoxyCodeLine{826         RSL\_IPAC\_EIE\_HO\_CANDIDATES    = 0x0d,}
\DoxyCodeLine{827         RSL\_IPAC\_EIE\_NCELL\_BA\_CHG\_LIST    = 0x0e,}
\DoxyCodeLine{828         RSL\_IPAC\_EIE\_NUM\_OF\_MS            = 0x10,}
\DoxyCodeLine{829         RSL\_IPAC\_EIE\_HO\_CAND\_EXT        = 0x11,}
\DoxyCodeLine{830         RSL\_IPAC\_EIE\_NCELL\_DEF\_EXT    = 0x12,}
\DoxyCodeLine{831         RSL\_IPAC\_EIE\_NCELL\_LIST\_EXT  = 0x13,}
\DoxyCodeLine{832         RSL\_IPAC\_EIE\_MASTER\_KEY          = 0x14,}
\DoxyCodeLine{833         RSL\_IPAC\_EIE\_MASTER\_SALT        = 0x15,}
\DoxyCodeLine{834         \textcolor{comment}{/* additional IPAC measurement pre-\/processing related IEI */}}
\DoxyCodeLine{835         RSL\_IPAC\_EIE\_MEAS\_TRANS\_RES  = 0x16,}
\DoxyCodeLine{836         RSL\_IPAC\_EIE\_3G\_HO\_PARAM        = 0x17,}
\DoxyCodeLine{837         RSL\_IPAC\_EIE\_3G\_NCELL\_LIST    = 0x18,}
\DoxyCodeLine{838         RSL\_IPAC\_EIE\_SDCCH\_CTL\_PARAM        = 0x1a,}
\DoxyCodeLine{839         RSL\_IPAC\_EIE\_AMR\_CONV\_THRESH        = 0x1b,}
\DoxyCodeLine{840 }
\DoxyCodeLine{841         \textcolor{comment}{/* Osmocom specific extensions: */}}
\DoxyCodeLine{842         RSL\_IPAC\_EIE\_OSMO\_MEAS\_AVG\_CFG    = 0xf0,}
\DoxyCodeLine{843         RSL\_IPAC\_EIE\_OSMO\_MS\_PWR\_CTL        = 0xf1,}
\DoxyCodeLine{844         RSL\_IPAC\_EIE\_OSMO\_PC\_THRESH\_COMP = 0xf2,}
\DoxyCodeLine{845 }
\DoxyCodeLine{846 \};}
\DoxyCodeLine{847 }
\DoxyCodeLine{848 \textcolor{comment}{/* Value of TLV IE RSL\_IPAC\_EIE\_MEAS\_AVG\_CFG */}}
\DoxyCodeLine{849 \textcolor{keyword}{struct }ipac\_preproc\_ave\_cfg \{}
\DoxyCodeLine{850 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{851         uint8\_t h\_reqave:5,}
\DoxyCodeLine{852                 param\_id:2,}
\DoxyCodeLine{853                 reserved:1;}
\DoxyCodeLine{854         uint8\_t h\_reqt:5,}
\DoxyCodeLine{855                 ave\_method:3;}
\DoxyCodeLine{856         uint8\_t params[0];}
\DoxyCodeLine{857 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{858 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{859         uint8\_t reserved:1, param\_id:2, h\_reqave:5;}
\DoxyCodeLine{860         uint8\_t ave\_method:3, h\_reqt:5;}
\DoxyCodeLine{861         uint8\_t params[0];}
\DoxyCodeLine{862 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{863 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{864 }
\DoxyCodeLine{865 }
\DoxyCodeLine{866 \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field \{}
\DoxyCodeLine{867 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{868         uint8\_t h\_reqave:5,}
\DoxyCodeLine{869                 ave\_enabled:1,}
\DoxyCodeLine{870                 reserved:2;}
\DoxyCodeLine{871         uint8\_t h\_reqt:5,}
\DoxyCodeLine{872                 ave\_method:3;}
\DoxyCodeLine{873 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{874 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{875         uint8\_t reserved:2, ave\_enabled:1, h\_reqave:5;}
\DoxyCodeLine{876         uint8\_t ave\_method:3, h\_reqt:5;}
\DoxyCodeLine{877 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{878 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{879 \textcolor{comment}{/* Value of TLV IE RSL\_IPAC\_EIE\_OSMO\_MEAS\_AVG\_CFG: */}}
\DoxyCodeLine{880 \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg \{}
\DoxyCodeLine{881         \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field ci\_fr;}
\DoxyCodeLine{882         \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field ci\_hr;}
\DoxyCodeLine{883         \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field ci\_amr\_fr;}
\DoxyCodeLine{884         \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field ci\_amr\_hr;}
\DoxyCodeLine{885         \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field ci\_sdcch;}
\DoxyCodeLine{886         \textcolor{keyword}{struct }osmo\_preproc\_ave\_cfg\_field ci\_gprs;}
\DoxyCodeLine{887         uint8\_t params[0]; \textcolor{comment}{/* Contains params for each above, appended one after the other */}}
\DoxyCodeLine{888 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{889 }
\DoxyCodeLine{891 \textcolor{keyword}{struct }ipac\_preproc\_pc\_thresh \{}
\DoxyCodeLine{892 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{893         uint8\_t l\_rxlev:6, reserved\_l\_rxlev:2;}
\DoxyCodeLine{894         uint8\_t u\_rxlev:6, reserved\_u\_rxlev:2;}
\DoxyCodeLine{895         uint8\_t u\_rxqual:3, reserved\_u\_rxqual:1,}
\DoxyCodeLine{896                 l\_rxqual:3, reserved\_l\_rxqual:1;}
\DoxyCodeLine{897 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{898 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{899         uint8\_t reserved\_l\_rxlev:2, l\_rxlev:6;}
\DoxyCodeLine{900         uint8\_t reserved\_u\_rxlev:2, u\_rxlev:6;}
\DoxyCodeLine{901         uint8\_t reserved\_l\_rxqual:1, l\_rxqual:3, reserved\_u\_rxqual:1, u\_rxqual:3;}
\DoxyCodeLine{902 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{903 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{904 }
\DoxyCodeLine{906 \textcolor{keyword}{struct }osmo\_preproc\_pc\_thresh \{}
\DoxyCodeLine{907         \textcolor{comment}{/* Carrier-\/to-\/Interference (C/I), in dB: */}}
\DoxyCodeLine{908         int8\_t l\_ci\_fr; int8\_t u\_ci\_fr; \textcolor{comment}{/* FR/EFR */}}
\DoxyCodeLine{909         int8\_t l\_ci\_hr; int8\_t u\_ci\_hr; \textcolor{comment}{/* HR */}}
\DoxyCodeLine{910         int8\_t l\_ci\_amr\_fr; int8\_t u\_ci\_amr\_fr; \textcolor{comment}{/* AMR FR */}}
\DoxyCodeLine{911         int8\_t l\_ci\_amr\_hr; int8\_t u\_ci\_amr\_hr; \textcolor{comment}{/* AMR HR */}}
\DoxyCodeLine{912         int8\_t l\_ci\_sdcch; int8\_t u\_ci\_sdcch; \textcolor{comment}{/* SDCCH */}}
\DoxyCodeLine{913         int8\_t l\_ci\_gprs; int8\_t u\_ci\_gprs; \textcolor{comment}{/* GPRS */}}
\DoxyCodeLine{914 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{915 }
\DoxyCodeLine{917 \textcolor{keyword}{struct }ipac\_preproc\_ho\_thresh \{}
\DoxyCodeLine{918 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{919         uint8\_t l\_rxlev\_ul\_h:6,}
\DoxyCodeLine{920                 reserved\_l\_rxlev\_ul:2;}
\DoxyCodeLine{921         uint8\_t l\_rxlev\_dl\_h:6,}
\DoxyCodeLine{922                 reserved\_l\_rxlev\_dl:2;}
\DoxyCodeLine{923         uint8\_t rxlev\_ul\_ih:6,}
\DoxyCodeLine{924                 reserved\_rxlev\_ul:2;}
\DoxyCodeLine{925         uint8\_t rxlev\_dl\_ih:6,}
\DoxyCodeLine{926                 reserved\_rxlev\_dl:2;}
\DoxyCodeLine{927         uint8\_t l\_rxqual\_ul\_h:3,}
\DoxyCodeLine{928                 reserved\_rxlqual\_ul:1,}
\DoxyCodeLine{929                 l\_rxqual\_dl\_h:3,}
\DoxyCodeLine{930                 reserved\_rxqual\_dl:1;}
\DoxyCodeLine{931         uint8\_t ms\_range\_max:6,}
\DoxyCodeLine{932                 reserved\_ms\_range:2;}
\DoxyCodeLine{933 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{934 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{935         uint8\_t reserved\_l\_rxlev\_ul:2, l\_rxlev\_ul\_h:6;}
\DoxyCodeLine{936         uint8\_t reserved\_l\_rxlev\_dl:2, l\_rxlev\_dl\_h:6;}
\DoxyCodeLine{937         uint8\_t reserved\_rxlev\_ul:2, rxlev\_ul\_ih:6;}
\DoxyCodeLine{938         uint8\_t reserved\_rxlev\_dl:2, rxlev\_dl\_ih:6;}
\DoxyCodeLine{939         uint8\_t reserved\_rxqual\_dl:1, l\_rxqual\_dl\_h:3, reserved\_rxlqual\_ul:1, l\_rxqual\_ul\_h:3;}
\DoxyCodeLine{940         uint8\_t reserved\_ms\_range:2, ms\_range\_max:6;}
\DoxyCodeLine{941 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{942 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{943 }
\DoxyCodeLine{945 \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp \{}
\DoxyCodeLine{946 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{947         uint8\_t p1:5, reserved\_p1:3;}
\DoxyCodeLine{948         uint8\_t n1:5, reserved\_n1:3;}
\DoxyCodeLine{949         uint8\_t p2:5, reserved\_p2:3;}
\DoxyCodeLine{950         uint8\_t n2:5, reserved\_n2:3;}
\DoxyCodeLine{951         uint8\_t p3:5, reserved\_p3:3;}
\DoxyCodeLine{952         uint8\_t n3:5, reserved\_n3:3;}
\DoxyCodeLine{953         uint8\_t p4:5, reserved\_p4:3;}
\DoxyCodeLine{954         uint8\_t n4:5, reserved\_n4:3;}
\DoxyCodeLine{955         uint8\_t pc\_interval:5, reserved\_pc:3;}
\DoxyCodeLine{956         uint8\_t red\_step\_size:4, inc\_step\_size:4;}
\DoxyCodeLine{957 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{958 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{959         uint8\_t reserved\_p1:3, p1:5;}
\DoxyCodeLine{960         uint8\_t reserved\_n1:3, n1:5;}
\DoxyCodeLine{961         uint8\_t reserved\_p2:3, p2:5;}
\DoxyCodeLine{962         uint8\_t reserved\_n2:3, n2:5;}
\DoxyCodeLine{963         uint8\_t reserved\_p3:3, p3:5;}
\DoxyCodeLine{964         uint8\_t reserved\_n3:3, n3:5;}
\DoxyCodeLine{965         uint8\_t reserved\_p4:3, p4:5;}
\DoxyCodeLine{966         uint8\_t reserved\_n4:3, n4:5;}
\DoxyCodeLine{967         uint8\_t reserved\_pc:3, pc\_interval:5;}
\DoxyCodeLine{968         uint8\_t inc\_step\_size:4, red\_step\_size:4;}
\DoxyCodeLine{969 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{970 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{971 }
\DoxyCodeLine{973 \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field \{}
\DoxyCodeLine{974 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{975         uint8\_t lower\_p:5, reserved\_lower\_p:3;}
\DoxyCodeLine{976         uint8\_t lower\_n:5, reserved\_lower\_n:3;}
\DoxyCodeLine{977         uint8\_t upper\_p:5, reserved\_upper\_p:3;}
\DoxyCodeLine{978         uint8\_t upper\_n:5, reserved\_upper\_n:3;}
\DoxyCodeLine{979 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{980 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{981         uint8\_t reserved\_lower\_p:3, lower\_p:5;}
\DoxyCodeLine{982         uint8\_t reserved\_lower\_n:3, lower\_n:5;}
\DoxyCodeLine{983         uint8\_t reserved\_upper\_p:3, upper\_p:5;}
\DoxyCodeLine{984         uint8\_t reserved\_upper\_n:3, upper\_n:5;}
\DoxyCodeLine{985 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{986 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{987 \textcolor{keyword}{struct }osmo\_preproc\_pc\_comp \{}
\DoxyCodeLine{988         \textcolor{comment}{/* Used for Carrier-\/to-\/Interference (C/I), in dB: */}}
\DoxyCodeLine{989         \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field ci\_fr;}
\DoxyCodeLine{990         \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field ci\_hr;}
\DoxyCodeLine{991         \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field ci\_amr\_fr;}
\DoxyCodeLine{992         \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field ci\_amr\_hr;}
\DoxyCodeLine{993         \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field ci\_sdcch;}
\DoxyCodeLine{994         \textcolor{keyword}{struct }ipac\_preproc\_pc\_comp\_field ci\_gprs;}
\DoxyCodeLine{995 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{996 }
\DoxyCodeLine{998 \textcolor{keyword}{struct }ipac\_preproc\_ho\_comp \{}
\DoxyCodeLine{999 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{1000         uint8\_t p5:5,}
\DoxyCodeLine{1001                 reserved\_p5:3;}
\DoxyCodeLine{1002         uint8\_t n5:5,}
\DoxyCodeLine{1003                 reserved\_n5:3;}
\DoxyCodeLine{1004         uint8\_t p6:5,}
\DoxyCodeLine{1005                 reserved\_p6:3;}
\DoxyCodeLine{1006         uint8\_t n6:5,}
\DoxyCodeLine{1007                 reserved\_n6:3;}
\DoxyCodeLine{1008         uint8\_t p7:5,}
\DoxyCodeLine{1009                 reserved\_p7:3;}
\DoxyCodeLine{1010         uint8\_t n7:5,}
\DoxyCodeLine{1011                 reserved\_n7:3;}
\DoxyCodeLine{1012         uint8\_t p8:5,}
\DoxyCodeLine{1013                 reserved\_p8:3;}
\DoxyCodeLine{1014         uint8\_t n8:5,}
\DoxyCodeLine{1015                 reserved\_n8:3;}
\DoxyCodeLine{1016         uint8\_t ho\_interval:5,}
\DoxyCodeLine{1017                 reserved\_ho:3;}
\DoxyCodeLine{1018         uint8\_t reserved;}
\DoxyCodeLine{1019 }
\DoxyCodeLine{1020 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{1021 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{1022         uint8\_t reserved\_p5:3, p5:5;}
\DoxyCodeLine{1023         uint8\_t reserved\_n5:3, n5:5;}
\DoxyCodeLine{1024         uint8\_t reserved\_p6:3, p6:5;}
\DoxyCodeLine{1025         uint8\_t reserved\_n6:3, n6:5;}
\DoxyCodeLine{1026         uint8\_t reserved\_p7:3, p7:5;}
\DoxyCodeLine{1027         uint8\_t reserved\_n7:3, n7:5;}
\DoxyCodeLine{1028         uint8\_t reserved\_p8:3, p8:5;}
\DoxyCodeLine{1029         uint8\_t reserved\_n8:3, n8:5;}
\DoxyCodeLine{1030         uint8\_t reserved\_ho:3, ho\_interval:5;}
\DoxyCodeLine{1031         uint8\_t reserved;}
\DoxyCodeLine{1032 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{1033 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{1034 }
\DoxyCodeLine{1035 \textcolor{keyword}{struct }ipac\_preproc\_ho\_candidates \{}
\DoxyCodeLine{1036 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{1037         uint8\_t bsic:6,}
\DoxyCodeLine{1038                 reserved0:2;}
\DoxyCodeLine{1039         uint8\_t bcch\_freq:5,}
\DoxyCodeLine{1040                 ba\_used:1,}
\DoxyCodeLine{1041                 s:1,}
\DoxyCodeLine{1042                 reserved1:1;}
\DoxyCodeLine{1043 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{1044 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{1045         uint8\_t reserved0:2, bsic:6;}
\DoxyCodeLine{1046         uint8\_t reserved1:1, s:1, ba\_used:1, bcch\_freq:5;}
\DoxyCodeLine{1047 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{1048 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{1049 }
\DoxyCodeLine{1050 \textcolor{keyword}{struct }ipac\_preproc\_ncell\_dflts \{}
\DoxyCodeLine{1051 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{1052         uint8\_t rxlev\_min\_def:6,}
\DoxyCodeLine{1053                 reserved\_rxlev\_min\_def:2;}
\DoxyCodeLine{1054         uint8\_t ho\_margin\_def:5,}
\DoxyCodeLine{1055                 reserved\_ho\_margin\_def:3;}
\DoxyCodeLine{1056         uint8\_t ms\_txpwr\_max\_def:5,}
\DoxyCodeLine{1057                 reserved\_ms\_txpwr\_max\_def:3;}
\DoxyCodeLine{1058 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{1059 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{1060         uint8\_t reserved\_rxlev\_min\_def:2, rxlev\_min\_def:6;}
\DoxyCodeLine{1061         uint8\_t reserved\_ho\_margin\_def:3, ho\_margin\_def:5;}
\DoxyCodeLine{1062         uint8\_t reserved\_ms\_txpwr\_max\_def:3, ms\_txpwr\_max\_def:5;}
\DoxyCodeLine{1063 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{1064 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{1065 }
\DoxyCodeLine{1066 \textcolor{keyword}{struct }ipac\_preproc\_ho\_ctl\_param \{}
\DoxyCodeLine{1067 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{1068         uint8\_t sdcch\_ho\_gsm:1,}
\DoxyCodeLine{1069                 sdcch\_ho\_umts:1,}
\DoxyCodeLine{1070                 reserved:6;}
\DoxyCodeLine{1071 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{1072 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{1073         uint8\_t reserved:6, sdcch\_ho\_umts:1, sdcch\_ho\_gsm:1;}
\DoxyCodeLine{1074 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{1075 \}\_\_attribute\_\_ ((packed));}
\DoxyCodeLine{1076 }
\DoxyCodeLine{1077 \textcolor{keyword}{struct }ipac\_preproc\_cfg \{}
\DoxyCodeLine{1078         uint8\_t meas\_rep\_mode;}
\DoxyCodeLine{1079         uint32\_t meas\_mode\_flags;}
\DoxyCodeLine{1080         \textcolor{keyword}{struct }ipac\_preproc\_ave\_cfg ms\_ave\_cfg[3];}
\DoxyCodeLine{1081         \textcolor{keyword}{struct }ipac\_preproc\_ave\_cfg ave\_cfg;}
\DoxyCodeLine{1082         \textcolor{keyword}{struct }ipac\_preproc\_ho\_thresh ho\_thresh;}
\DoxyCodeLine{1083         \textcolor{keyword}{struct }ipac\_preproc\_ho\_comp ho\_comp;}
\DoxyCodeLine{1084         \textcolor{keyword}{struct }ipac\_preproc\_ncell\_dflts ncell\_dflts;}
\DoxyCodeLine{1085         \textcolor{keyword}{struct }ipac\_preproc\_ho\_ctl\_param ho\_ctl\_param;}
\DoxyCodeLine{1086 \};}
\DoxyCodeLine{1087 }
\DoxyCodeLine{1088 \textcolor{keyword}{struct }rsl\_l1\_info \{}
\DoxyCodeLine{1089 \textcolor{preprocessor}{\#if OSMO\_IS\_LITTLE\_ENDIAN}}
\DoxyCodeLine{1090                 uint8\_t reserved:1,}
\DoxyCodeLine{1091                         srr\_sro:1,}
\DoxyCodeLine{1092                         fpc\_epc:1,}
\DoxyCodeLine{1093                         ms\_pwr:5;}
\DoxyCodeLine{1094                 uint8\_t ta;}
\DoxyCodeLine{1095 \textcolor{preprocessor}{\#elif OSMO\_IS\_BIG\_ENDIAN}}
\DoxyCodeLine{1096 \textcolor{comment}{/* auto-\/generated from the little endian part above (libosmocore/contrib/struct\_endianness.py) */}}
\DoxyCodeLine{1097                 uint8\_t ms\_pwr:5, fpc\_epc:1, srr\_sro:1, reserved:1;}
\DoxyCodeLine{1098                 uint8\_t ta;}
\DoxyCodeLine{1099 \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{1100 \} \_\_attribute\_\_ ((packed));}
\DoxyCodeLine{1101 }

\end{DoxyCode}
