#644 (Dec 11, 2025, 2:46:00 PM)

Started by timer

This run spent:

• 16 ms waiting;
• 40 min build duration;
• 40 min total from scheduled to completion.

• origin/master

• MSC_Tests.TC_lu_imsi_timeout_tmsi_realloc
• MSC_Tests_Iu.TC_iu_lu_imsi_timeout_tmsi_realloc
• MSC_Tests_Iu.TC_iu_cmserv_imsi_unknown
• MSC_Tests_Iu.TC_iu_lu_and_mt_sms_paging_repeated
• MSC_Tests_Iu.TC_iu_lu_with_invalid_mcc_mnc

1. bts: create all components alive (details)
2. bts: fix unbound variable in as_rsl_fail_err() (details)
3. fixup: bts: create all components alive (details)