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Test Result : (root)

18 failures (+1)

225 tests (±0)

All Failed Tests

Test Name	Duration	Age
MSC_Tests.TC_attached_imsi_lu_unknown_tmsi Loading...	6.5 sec	1369
MSC_Tests.TC_gsup_mo_mt_sms_rp_mr Loading...	1.2 sec	128
MSC_Tests.TC_gsup_mo_smma Loading...	1.2 sec	128
MSC_Tests.TC_gsup_mo_sms Loading...	1.3 sec	128
MSC_Tests.TC_lu_imsi_timeout_tmsi_realloc Loading...	8.1 sec	1555
MSC_Tests.TC_lu_tmsi_noauth_notmsi Loading...	2.3 sec	31
MSC_Tests.TC_mo_ussd_for_unknown_trans Loading...	12 sec	1
MSC_Tests.TC_mt_ussd_for_unknown_subscr Loading...	1 sec	128
MSC_Tests.TC_proc_ss_for_unknown_session Loading...	1 sec	128
MSC_Tests_Iu.TC_iu_cmserv_imsi_unknown Loading...	1 min 0 sec	1555
MSC_Tests_Iu.TC_iu_gsup_mo_mt_sms_rp_mr Loading...	1.4 sec	128
MSC_Tests_Iu.TC_iu_gsup_mo_smma Loading...	1.7 sec	128
MSC_Tests_Iu.TC_iu_gsup_mo_sms Loading...	1.6 sec	128
MSC_Tests_Iu.TC_iu_lu_and_mt_sms_paging_repeated Loading...	7.5 sec	1555
MSC_Tests_Iu.TC_iu_lu_imsi_timeout_tmsi_realloc Loading...	8.1 sec	1555
MSC_Tests_Iu.TC_iu_lu_with_invalid_mcc_mnc Loading...	1 min 1 sec	1375
MSC_Tests_Iu.TC_iu_mt_ussd_for_unknown_subscr Loading...	1.3 sec	128
MSC_Tests_Iu.TC_iu_proc_ss_for_unknown_session Loading...	1.4 sec	128

All Tests

Class	Duration	Fail	(diff)	Skip	(diff)	Pass	(diff)	Total	(diff)
MSC_Tests	12 min	9	+1	0		157	-1	166
MSC_Tests_ASCI	12 sec	0		0		5		5
MSC_Tests_Iu	5 min 24 sec	9		0		45		54