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b@WAdd8t?H@LIHIIDфLEHE1RL(EXA8t?H@LIHIIDфLEHE1RLDXA8t?H@LIHIIDфLEHE1RLDXA]]8t@H@LIHIIDфLEHRL5DA_E1Add8t@H@LIHIIDфLEHE1RLCA[Aee8t@H@LIHIIDфLEHE1RLCAZ@u~Amm8t>HLIHIIDфLEH1RLE16CAYI0H0HHt$HD$N%EA9t#PI@LHLE1BAXH$fx wEA9 EA9t"P@ILHLE1{B^A8t?H@LIHIIDфLEHE1RL)BY@ EHHA9EPPA9sELLA98ETTA9A8t=HLAIHIIDфLEH1RLxAXEA9&EA9[EA9EA9EA9EXXA9FEA9 H<$ED9#A8t=HLAIHIIDфLEH1RLg@YA8t=HLAIHIIDфLEH1RL@ZA8t=HLAIHIIDфLEH1RL?XE``fA9t PIL1HLA?XEbbfA9t PIL1HLA]?XA9"EfA9t PIL1HLA?XEfA9t PIL1HLA>XEfA9t!PIL1HL>A_AEfA9t!PIL1HLAu>A[EfA9t!PIL1HLA?>AZEfA9t!PIL1HLA >AYEfA9t!PIL1HLA=AXEfA9t PLILH1A=_EfA9t P1ILHLAh=^EfA9t PHL1ILA3=YEfA9t PLI1HLAEllA8t#P@ILHLE12AZEhhA9t#P@ILHLE12AYEA8t#PI@LHLE1{2AXA8t?HL@IHIIDфLEHE1RL(2_A8t?H@LIHIIDфLEHE1RL1^A8t?H@LIHIIDфLEHE1RL1YAFF8t?H@LIHIIDфLEHE1RL21ZAGG8t?H@LIHIIDфLEHE1RL0XA>>8t?H@LIHIIDфLEHE1RL0XEA8t"P@ILHLE1X0XEA8t"P@ILHLE1"0XEfA9t"P@ILHLE1/XEfA9t#P@ILHL/A_E1EfA9t#P@ILHLE1|/A[EfA9t#P@ILHLE1D/AZEfA9t#P@ILHLE1 /AYEfA9t#PI@LHLE1.AXE44fA9t"PL@IHLE1._E66fA9t"P@ILHLE1e.^E22A8t"PH@LILE1/.YEA8t"PL@IHLE1-ZE00A8t"P@ILHLE1-XE11A8t"P@ILHLE1-XE::fA9t"P@ILHLE1V-XE88fA9t"P@ILHLE1-XEfA9t"P@ILHLE1,XE<<fA9t#P@ILHL,A_E1E..fA9t#P@ILHLE1y,A[EA8t#P@ILHLE1B,AZEA8t#P@ILHLE1 ,AYE@@fA9t#PI@LHLE1+AXEHHA8t"PL@IHLE1+_EJJfA9t"P@ILHLE1e+^A8t?H@LIHIIDфLEHE1RL+YA8t?H@LIHIIDфLEHE1RL*ZEfA9t"P@ILHLE1*XA8t?H@LIHIIDфLEHE1RL8*XEA8t"P@ILHLE1*XEA8t"P@ILHLE1)X@vA8t=HLIHIIDфLEH1RLE1s)XEfA9#EfA9}EfA9>EA8rEfA9jEA9EA9MHI9rMHI96A8t=HLAIHIIDфLEH1RLM(XHD$PeH+%( HXD[]A\A]A^A_ EfA9EfA9)P@ILHLE1'XE  fA9EfA9P@ILHLE1f'XhEA9E||A9wP@ILHLE1'XPH11P@ILHLE1&X=]P@ILHLE1&XSP@ILHLE1|&XP@ILHLE1U&XVD9NP@=DD!ED$@AD$APE!IHLL%A_E1~D9PIHAEAt$At$DDEA9D|$@AWE1ASAPIQHPARD$8PWLRL %HHAEAt$At$DDEA9!D|$@AWASAPIQHPARD$8PWLRL$HHPIL1HLAm$AXpPLI1HLAG$ZPHL1ILA"$YiP1ILHLA#^-PLILH1A#_PLILH1A#_PIL1HLA#AXPIL1HLAh#AYXPIL1HLAB#AZPIL1HLA#XPIL1HLA"A[PIL1HL"A_APIL1HLA"XPIL1HLA"XPIL1HLAa"XhPLI1HLE1<"Z-PIL1HL"A_APL@IHLE1!_;PIL1HLA!AZPIL1HLA!A[]PIL1HLA~!AYhILLM>H@W!HLHT$LLHLHT$LLE1H$fx IHHHt$HD$wM>ILLH@IMLEAHLE HLHt$LHLHt$LE1H$Hp x*A9 A9 $A9$,A9,A98A9% A9 A9R9hD9_t$A9RD9T$Gz@LLE1H D@LLE1H@LLE1H@ARILLPHA_E1Xxfx 9A9t$A9D9T$HLR@LAPIE1rxAxAZA[1 A@RILLPHE1&xAxAXAY1@LRALE1PHIxAx^_1IL1LH H0A80tLcjE11AWLL$ HHE11jHHAWLL$(AH HL1LE11HLR@LAPIE1ZYPIH1LLA^9A9t$A9D9T$9A9t$A9D9T$/HILt^A9HI1LIL1LHE1E1YIL1LHE1fAVAUATUSLoIII9tjHIHXD HCHXI9tMpIsHHH=w!Qt@ uLHH)t[]A\A]A^[1]A\A]A^@AWD=AVIAUATIUSLoIIHhI9uaPtF@ u@LHLg)uQK fD<ƃ>ƃƃEHEHhI9t%HLHH=v[]A\A]A^A_[1]A\A]A^A_fAUATAUHSHHHXHIEHƀHEHXH9u=HCHXH9t0pIsHLH=wE f<I_AD9IcHH)IW HH8tHhE tHHXLeM4$8tƅ>HH e 9099 99ƅ=f9f9ƅ>^9pJHLxWIwDIkH(H9,HHHLHA $hIcO(9MI`LT$1HIAG(LT$#Dl$M A;o(HcHIG0HH8tHPLjH9ZuILLyH<$MM8EEHHtHwPHD$1X$p-HLnIw5HA $hIcO(LHH)LtHL`I9tpAtV‰ȸH!A$pHs1A$MO LLHH)IH@ƀBID$L`I9uAƆIwHAH p$H HL11HhI9H<$LK DC`HHtHwPHD$fx $H/LJDBXHtHvH1DT$,IHMK EC`HHtHsARHW1[] E~L1EHcHH)IW HH0HtH@@ tLD$3I_9El$3@Ht$8HD$E1HD$8E1E1HD$@H|$8HHcA;W(oIO0HHHRHVLJMtHzNA  wADH|$8HAEHA HsH|$8E @ I_D$I19 H$EHHcHIGHLhHtIIHt=LIH=H9IWAA9$ ;|L,$EHӋH߅LHH1Ll$LMD$H|$;OHcHH)HK HL8LpMtHD$HL`I9tAA$pHsuM9tpHcHCHE1H4HHt Ap9PuLHA H H9uALHAÅHsHID$L`I9c AA mHƅ<I_AD9dD$-E1EL`A$QAD$ LtAL$ fA$<AƄ$>LA$lA$ht8H LtAL$ AƄ$>fA$<A$I_mAA9IcHH)IW HH0H ɃwhHp @*zH{HWPHuHHT$HT$HHH  AI_1E܋HcHH)IW HH8tHxHLI_9Eo IELhH9$UDt$( eA$pLHaFAL$ AƄ$>fA$<"HcIG DH4H)H< H8H9bHHtHpQtދpIsF tAL$ AƄ$>fA$<I_B1HD$HxH_PHuHHHHH IWօBIAHFL,$EAÅA'AIGHxH_PH/HHHH HzH_PHHHHH IWH{HWPHLL$HT$HT$HHH LL$gID$HLl$~@1EHcHIGL MtLLAÅI_;|EDDEHcHH)IW HL HHLpMtlLLH $fAÅxAH $t=A9tLLxAÅ*I_;_LAÅLAÅHt$3LAÅLQ D$3IGAƇ@C LAÅLAÅI_AŋHLÅfA$x v;AF u A<tLÅLHLÅA$ xtHLÅfA$x wA$MW HH)HUILpfx AQt1ۄtBAAi@…8‰C ș9NЉfA`HtPLHH=1AQt%AJ i@19OfAbHLÅI_AD;IcIW HH)H,HtԋLeHH)LtAF fA$x wA$t tHLÅuHLÅMLM DE`MtMl$HL1AHzH_PHtNHHHH AIHQH HHHt$HtHvH1IH\$ MM IS AC`EE`HHtHsRH1PAZA[kML$ED$XLMtIuH1D$D$H߅FALO DG`HtHvH1ALO DG`HtHvH1wLO DG`HtHvH1NLM DE`M1MtIt$H1Å8tUIAX1H8Ai@Dtt عø9O{1tLAÅI_E1ADHEIcHH)IW HH(HXHxHIHH)IW HL@HPA,APA@ A8HcIwHLD$HH$HHp9PL\$HNHVLEEEtoMLMrxMMIMIwAM=LHD@XHHtHwAVH1^\MuH H94$?<C u5<Ht LHIAD9QVt^IMc`EELAD$AD$AxA@Ip AVLL$ Dq,IBFtLHD$ AD+qLIHDH$T$(LL$T$(DILXH.H<$DT$L$LL$HD$ H<$LL$ Ip T$Dq,Dt A D+qLDLL$DT$IHHXH<$DAptAuTuUAVA`H|$IGLfAx vLHܐIyHWPHuHDD$ DT$L $HT$(HT$(HHH DD$ LcT$L $DHOATU1SHHcHH)HS HL Mt'H@PtLH LH0SHK9~D1HcHH)HS HH0HtH@Pt HHK9[]A\fAWIAVAUATUSH8eH%(HD$0HGHD$ HD$(HcHD$Hw HD$E1H<H)HLHxE ݋| H8I9t6HHtHxPtHcpIIG tH8D\$I9u1AIw HcHH)H4HtpHs LQIW9LEIWxHcЉHH)H)H,HH)HH$HxHhDHt$ H|$HIcDLLT HHI,H|$E!f9Dl$E0HCH9$t:HIG HL0MtEpALNHCH9$uELE1IW\$%9ptUAD9IcHH)IO H L1MtApHsLiAI}uLu2Alu(IELLpHA !IWAD9iE1 DA9tTAD9~lIcHH)IO H H1HtӋpHsHIH puHLAH !IWD9~KDd$1HcHH)IO HH0HtpIs LNIW9HcЉH,H)H)L$HI)IHIG HL0MtiEpT$LsWLPDHt$ IL$L$AIcDLLT HH D$EHEL9x|$HD$0eH+%('H8[]A\A]A^A_Hf9EHCH9$ LEHD$HxHWPHt7L$HT$HT$HHH L$ HD$HD$HxH_PHuHHHHH HD$HxH_PHuHHHHH DAVL AUATAUHLSHH{HCxfx wSCtM~CHs 1HcHH)HH:tHRu Atc9HAŅAAHAŅt#HHL[D]A\A]A^HAŅuξHAŅuHE1HHK~_IcHHSHHt?HJXHHtHHRHHtHHKAD;|P HHCpHCXHC`HC`HChEtXHSXtmH@HHtHuEH1LD[]A\A]A^t HH!WH@xH5H#fSHH[f.ATUS Ht[]A\HnALgPMuL'LHH []A\fAVAUATUHSHH Hp @*p  *)HHAAHAAHHH8AHAAuEtAHA!ľ@H@HHH8@HAAuEt E HHABHABHHH8BHAAuEtBHA!ľ`H`HHH8`HAAuEt EHCHACHHH8CHAAuEtCHlHlHHH8lHAAuEtlHHHLAHpI9H>HLHBI9E1ۋpHsDA HPHBI9uD^HHHǰE1HBH9tCH9t&HsHs HDDA HPHBH9uHFDFLHpI9;HH[]A\A]A^fx ‰  ʅt$f=uG H HHH8 HAA@uX@H@HHH8@HAAu*tHHHE1m[]A\A]A^X Ex Jfqf@HHHHHAH@tc@H@HHH8@HAAt1Ҿ@H@H@HHH8@HAAPHPHHH8PHAArEBHBHHH8BHAACHCHHH8CHAACH`H@HHHBHD`H`HHH8`HAA`HPHw@H@HAHAHHH8AHAAAHHH@PH@H@HHH8@HAA1HtHsH1@HAĄuZtN1HtHs1H@HtAH@H@HHH8@HAAt31HtHsH1`HAEtKCHCHHH8CHAAnHp x+wHj H HHH8 HAA@H@HHH8@HAA`H`HHH8`HAA1HtHs1H`HBH;CH{H@H@f~H N,Nx DfHBt ff f A9~fw A D@A9DH9<H94H 9,HD9H9H9@19 u&A9 A @@wA9~뻀 uf fEɉAAD,ufDfx NHv@f?v.v )~ Pp)ֺ~ 1f9HRv )ֺ~Pp)ֺ~1u@x 1fv-fv,R N9F9f v  ̿ff.fx HwHp HB*t H(pHuHH HDH(fAWAVAUATUSHHXH|$H|$eH%(HD$P1HHH1H|$IHAƅHHD$H$IEHHD$HHXH9$uHCHXH9$HLIH=PtHLuhHD$AO HLpH9tA IFLpH9tANDDA#GtIpHtLLuHLtu$LH|$LtܺAUtA~MH|$$H|$$HT$PeH+%(u?HX[]A\A]A^A_$L$볾L$$랸@AWAVAUATAUSHH@eH%(HD$81H$Ht$HHD$H HD$$HD$,HD$D$ =BbH3D$$ED$ADL$(HtHvPH1McMoH|$HXL$$H߉D$j,BlLA+jLAƉD$HALXH.HHXHߋj,Bl +jLHLXH.HHXHߋj,Bl +jLHLXH.HHXHߋj,Bl +jLHLXH .HHXHߋj,Bl +jLHLXH .HHXHߋj,Bl +jLHLXH.HHXHߋj,Bl +jLHLXH.HB,@`HHDl$LXHD.H߃HHLXHD.H߽`D$Z% AHX@,E~ CTd,`D$(HDHDDAHHXDHHXHD`,ADHDDHHXDHHXHD`,ADH1DHH8DH HXHD`,ADHDDHHXDHHXHD`,ADHDDHHXDHHXHD`,ADH1DHH8HD AhHXHMg h,Bl0+h0HHHXHHXHߋh,B,+h0H1҉HH8H߉H<$HD$8eH+%(uOH@[]A\A]A^A_HHxHoPHuH/HHHH %ff.fAWAVAUATUHSHHLoMILEHH)HW MeHfA$x LppD$HHLLAHHVAiu*A$ t$LHHfA$x tt$1LI$HHxZA$H[]A\A]A^A_IA`1L8LIp IHHL$@,0ƉD$It$HH8t$H|$D$MDD$LtIwH1Ip H|$@,0ƉD$ID|$1ҹHDHXH|$Dtt$HL[]A\A]A^A_KH#Lt$LnLAVAUATAUSHH3ED$AIHtHvH1HXHߋh,ŀHHH8HAEHXHߋh,h4ŀ+h0HHH8HAElHXHߋh,h8ŀ+h0HHH8HAEUHXHߋh,ŀHHH8HAA'CHXHߋh,hlŀ+hhHHH8HAA'+HXIcHLr h,l0+h0H1҉HHXHHXHߋh,B,+h0H1҉HH8H߽`LHX@,E~ CTd,`D$(HDHDHHXDHHXHh,H1HH8H[]A\A]A^HHxHoPHuH/HHHH AHHxHoPHuH/HHHH XHHxHoPHuH/HHHH oHHxHoPHuH/HHHH HHxHoPHuH/HHHH fDSHeH%(HD$1HH$HD$ Hh u=HHHtUH` tHH tH{@Hh tH H HHHuHHD$eH+%(u H[fDfx w1onoff73infoframeexpected: found: Using %s as Y plane for %s linked->idMissing case (%s == %ld) as_sdpmismatch in %s dp sdp crtc_state->pipe_bpp%s %s: [drm] %stmpdrm_WARN_ON(active)czclkCZ clock rate: %d kHz yesnodig_port->base.portenabling pipe %c disabling pipe %c drm_WARN_ON(ret)drm_WARN_ON(disable_pipes)enableddisableddrm_WARN_ON(crtc->active)C10C20(expected %s, found %s)hw.enablehw.active(expected %i, found %i)cpu_transcodermst_master_transcoderhas_pch_encoderfdi_lanesfdi_m_nlane_countlane_lat_optim_maskdp_m_ndp_m2_n2output_typesframestart_delaymsa_timing_delayhw.pipe_mode.crtc_hdisplayhw.pipe_mode.crtc_htotalhw.pipe_mode.crtc_hblank_endhw.pipe_mode.crtc_hsync_starthw.pipe_mode.crtc_hsync_endhw.pipe_mode.crtc_vdisplayhw.pipe_mode.crtc_vsync_starthw.pipe_mode.crtc_vsync_endhw.pipe_mode.crtc_vtotalhw.pipe_mode.crtc_vblank_endhw.adjusted_mode.crtc_htotalhw.adjusted_mode.crtc_vtotalpixel_multiplier(%x) (expected %i, found %i)hw.adjusted_mode.flagsoutput_formathas_hdmi_sinklimited_color_rangehdmi_scramblinghdmi_high_tmds_clock_ratiohas_infoframeenhanced_framingfec_enablehas_audiobuffereldexpected: found: gmch_pfit.controlgmch_pfit.pgm_ratiosgmch_pfit.lvds_border_bitspch_pfit.force_thrupipe_src.x1pipe_src.x2pipe_src.y1pipe_src.y2pch_pfit.enabledpch_pfit.dst.x1pch_pfit.dst.x2pch_pfit.dst.y1pch_pfit.dst.y2scaler_state.scaler_idpixel_rategamma_modecgm_modecsc_modegamma_enablecsc_enablewgc_enablelinetimeips_linetimepre_csc_lutpost_csc_lutcsc.preoff[0]csc.preoff[1]csc.preoff[2]csc.coeff[0]csc.coeff[1]csc.coeff[2]csc.coeff[3]csc.coeff[4]csc.coeff[5]csc.coeff[6]csc.coeff[7]csc.coeff[8]csc.postoff[0]csc.postoff[1]csc.postoff[2]output_csc.preoff[0]output_csc.preoff[1]output_csc.preoff[2]output_csc.coeff[0]output_csc.coeff[1]output_csc.coeff[2]output_csc.coeff[3]output_csc.coeff[4]output_csc.coeff[5]output_csc.coeff[6]output_csc.coeff[7]output_csc.coeff[8]output_csc.postoff[0]output_csc.postoff[1]output_csc.postoff[2]has_psrhas_sel_updateenable_psr2_sel_fetchenable_psr2_su_region_ethas_panel_replaydouble_wide(expected %p, found %p)shared_dpll dpll_hw_statedpll_hw_state.cx0plldsi_pll.ctrldsi_pll.divpipe_bpphw.pipe_mode.crtc_clockhw.adjusted_mode.crtc_clockport_clockmin_voltage_levelinfoframes.enableinfoframes.gcpavispdhdmidrmdp sdpvscsync_mode_slaves_maskmaster_transcoderjoiner_pipesdsc.config.block_pred_enabledsc.config.convert_rgbdsc.config.simple_422dsc.config.native_422dsc.config.native_420dsc.config.vbr_enabledsc.config.line_buf_depthdsc.config.bits_per_componentdsc.config.pic_widthdsc.config.pic_heightdsc.config.slice_widthdsc.config.slice_heightdsc.config.initial_dec_delaydsc.config.initial_xmit_delaydsc.config.flatness_min_qpdsc.config.flatness_max_qpdsc.config.slice_bpg_offsetdsc.config.nfl_bpg_offsetdsc.config.initial_offsetdsc.config.final_offsetdsc.config.rc_model_sizedsc.config.slice_chunk_sizedsc.config.nsl_bpg_offsetdsc.compression_enabledsc.dsc_splitdsc.compressed_bpp_x16splitter.enablesplitter.link_countsplitter.pixel_overlapvrr.enablevrr.vminvrr.vmaxvrr.fliplinevrr.pipeline_fullvrr.guardbandvrr.vsync_startvrr.vsync_end(expected %lli, found %lli)cmrr.cmrr_mcmrr.cmrr_ncmrr.enablemodesetfastset[CRTC:%d:%s] not active conn_state->max_bpcfaileddrm_WARN_ON(modeset_pipes)drm_WARN_ON(update_pipes)probing SDVOB probing HDMI on SDVOB probing SDVOC probing HDMI on SDVOC ABCDEDPDSI ADSI C%s %s: [drm] %s assertion failure (expected %s, current %s) drivers/gpu/drm/i915/display/intel_display.c[drm] *ERROR* %s assertion failure (expected %s, current %s) [CRTC:%d:%s] fastset requirement not met in %s %pV [CRTC:%d:%s] mismatch in %s %pV Need %d free Y planes for planar YUV fastset requirement not met in %s dp sdp [CRTC:%d:%s] Full modeset due to %s drm_WARN_ON(pipe != crtc->pipe)drm_WARN_ON(expected_secondary_pipes(primary_ultrajoiner_pipes, 3) != secondary_ultrajoiner_pipes)drm_WARN_ON((primary_ultrajoiner_pipes & secondary_ultrajoiner_pipes) != 0)drm_WARN_ON((primary_uncompressed_joiner_pipes & secondary_uncompressed_joiner_pipes) != 0)drm_WARN_ON((primary_bigjoiner_pipes & secondary_bigjoiner_pipes) != 0)%s %s: [drm] Ultrajoiner pipes(%#x) should be bigjoiner pipes(%#x) %s %s: [drm] Wrong secondary ultrajoiner pipes(expected %#x, current %#x) %s %s: [drm] Uncompressed joiner pipes(%#x) and bigjoiner pipes(%#x) can't intersect %s %s: [drm] Wrong secondary bigjoiner pipes(expected %#x, current %#x) %s %s: [drm] Wrong secondary uncompressed joiner pipes(expected %#x, current %#x) %s %s: [drm] Wrong ultrajoiner secondary pipes for primary_pipe %#x (expected %#x, current %#x) %s %s: [drm] Wrong uncompressed joiner secondary pipes for primary_pipe %#x (expected %#x, current %#x) %s %s: [drm] Wrong bigjoiner secondary pipes for primary_pipe %#x (expected %#x, current %#x) %s %s: [drm] unknown pipe linked to transcoder %s drm_WARN_ON(has_edp_transcoders(enabled_transcoders) + has_dsi_transcoders(enabled_transcoders) + has_pipe_transcoders(enabled_transcoders) > 1)drm_WARN_ON(!has_dsi_transcoders(enabled_transcoders) && !is_power_of_2(enabled_transcoders))drm_WARN_ON((tmp & ((u32)(((((1UL))) << (26)) + ((int)(sizeof(struct { int:(-!!((sizeof(int) == sizeof(*(8 ? ((void *)((long)(26) * 0l)) : (int *)8))) && ((26) < 0 || (26) > 31))); })))))) == 0)%s %s: [drm] %s change in progress [CRTC:%d:%s] Odd pipe source width not supported with double wide pipe [CRTC:%d:%s] Odd pipe source width not supported with dual link LVDS [CRTC:%d:%s] requested pixel clock (%d kHz) too high (max: %d kHz, double wide: %s) %s %s: [drm] transcoder %s assertion failure (expected %s, current %s) [drm] *ERROR* transcoder %s assertion failure (expected %s, current %s) drm_WARN_ON(__intel_de_read(_Generic(dev_priv, const struct drm_i915_private *: (&((const struct drm_i915_private *)(dev_priv))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(dev_priv))->display), const struct intel_display *: (dev_priv), struct intel_display *: (dev_priv)), ((const i915_reg_t){ .reg = (((_Generic(dev_priv, const struct drm_i915_private *: (&((const struct drm_i915_private *)(dev_priv))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(dev_priv))->display), const struct intel_display *: (dev_priv), struct intel_display *: (dev_priv))->info.__device_info)->mmio_offset) + 0x61230) })) & ((u32)(((((1UL))) << (31)) + ((int)(sizeof(struct { int:(-!!((sizeof(int) == sizeof(*(8 ? ((void *)((long)(31) * 0l)) : (int *)8))) && ((31) < 0 || (31) > 31))); }))))))%s %s: [drm] timed out waiting for [ENCODER:%d:%s] port ready: got 0x%x, expected 0x%x drm_WARN_ON(!IS_PLATFORM(dev_priv, INTEL_I830))%s %s: [drm] pipe_off wait timed out Disabling [PLANE:%d:%s] on [CRTC:%d:%s] %s %s: [drm] %d encoders for pipe %c drm_WARN_ON(!intel_display_power_is_enabled(i915, POWER_DOMAIN_DC_OFF))SSC %s by BIOS, overriding VBT which says %s drm_WARN_ON(crtc_state->limited_color_range && crtc_state->output_format != INTEL_OUTPUT_FORMAT_RGB)(expected tu %i data %i/%i link %i/%i, found tu %i, data %i/%i link %i/%i)(expected 0x%08x, found 0x%08x)hw.pipe_mode.crtc_hblank_starthw.pipe_mode.crtc_vblank_starthw.adjusted_mode.crtc_hdisplayhw.adjusted_mode.crtc_hblank_starthw.adjusted_mode.crtc_hblank_endhw.adjusted_mode.crtc_hsync_starthw.adjusted_mode.crtc_hsync_endhw.adjusted_mode.crtc_vdisplayhw.adjusted_mode.crtc_vblank_starthw.adjusted_mode.crtc_vsync_starthw.adjusted_mode.crtc_vsync_endhw.adjusted_mode.crtc_vblank_endhw_state doesn't match sw_statedsc.config.scale_decrement_intervaldsc.config.scale_increment_intervaldsc.config.initial_scale_valuedsc.config.first_line_bpg_offsetdsc.config.rc_quant_incr_limit0dsc.config.rc_quant_incr_limit1dsc.config.second_line_bpg_offset[CRTC:%d:%s] modeset required [CRTC:%d:%s] async flip disallowed with joiner [PLANE:%d:%s] async flip not supported [PLANE:%d:%s] no old or new framebuffer drm_WARN_ON(intel_crtc_is_joiner_secondary(new_crtc_state))[CONNECTOR:%d:%s] Limiting display bpp to %d (EDID bpp %d, max requested bpp %d, max platform bpp %d) [CRTC:%d:%s] Link bpp limited to %d.%04d [ENCODER:%d:%s] rejecting invalid cloning configuration [ENCODER:%d:%s] config failure: %d [CRTC:%d:%s] config failure: %d [CRTC:%d:%s] hw max bpp: %i, pipe bpp: %i, dithering: %i drm_WARN_ON(new_crtc_state->uapi.enable)drm_WARN_ON(primary_crtc->pipe != joiner_primary_pipe(primary_crtc_state))[CRTC:%d:%s] Cannot act as joiner primary (need 0x%x as pipes, only 0x%x possible) [CRTC:%d:%s] secondary is enabled as normal CRTC, but [CRTC:%d:%s] claiming this CRTC for joiner. [CRTC:%d:%s] Used as secondary for joiner primary [CRTC:%d:%s] [CRTC:%d:%s] fastset requirement not met, forcing full modeset drm_WARN_ON(!connector_state->crtc)drm_WARN_ON(!((_Generic(to_i915(dev), const struct drm_i915_private *: (&((const struct drm_i915_private *)(to_i915(dev)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(to_i915(dev)))->display), const struct intel_display *: (to_i915(dev)), struct intel_display *: (to_i915(dev)))->info.__device_info)->has_ddi))rejecting conflicting digital port configuration drm_WARN_ON(linked_plane_state->planar_linked_plane != plane)drm_WARN_ON(linked_plane_state->planar_slave == plane_state->planar_slave)[PLANE:%d:%s] atomic driver check failed [CRTC:%d:%s] watermarks are invalid [CRTC:%d:%s] atomic driver check failed [CRTC:%d:%s] Active planes cannot be in async flip drm_WARN_ON(new_crtc_state->do_async_flip && !plane->async_flip)[PLANE:%d:%s] Modifier 0x%llx does not support async flip on display ver %d [PLANE:%d:%s] Modifier 0x%llx does not support async flip [PLANE:%d:%s] Planar formats do not support async flips [PLANE:%d:%s] Stride cannot be changed in async flip [PLANE:%d:%s] Modifier cannot be changed in async flip [PLANE:%d:%s] Pixel format cannot be changed in async flip [PLANE:%d:%s] Rotation cannot be changed in async flip [PLANE:%d:%s] Size/co-ordinates cannot be changed in async flip [PLANES:%d:%s] Alpha value cannot be changed in async flip [PLANE:%d:%s] Pixel blend mode cannot be changed in async flip [PLANE:%d:%s] Color encoding cannot be changed in async flip [PLANE:%d:%s] Color range cannot be changed in async flip [PLANE:%d:%s] Decryption cannot be changed in async flip drm_WARN_ON(intel_crtc_needs_modeset(new_crtc_state) && intel_crtc_needs_fastset(new_crtc_state))drm_WARN_ON(adjusted_mode->flags & (1<<4))drm_WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb, entries, I915_MAX_PIPES, pipe))Preparing state failed with %i %s %s: [drm] Platform does not support port %c drm_WARN_ON(i9xx_calc_dpll_params(48000, &clock) != 25154)enabling pipe %c due to force quirk (vco=%d dot=%d) disabling pfit, current: 0x%08x disabling pipe %c due to force quirk drm_WARN_ON(__intel_de_read(_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display)), ((const i915_reg_t){ .reg = ((_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->pipe_offsets[(PLANE_A)] - (_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->pipe_offsets[PIPE_A] + ((_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->mmio_offset) + (0x70180)) })) & ((u32)(((((1UL))) << (31)) + ((int)(sizeof(struct { int:(-!!((sizeof(int) == sizeof(*(8 ? ((void *)((long)(31) * 0l)) : (int *)8))) && ((31) < 0 || (31) > 31))); }))))))drm_WARN_ON(__intel_de_read(_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display)), ((const i915_reg_t){ .reg = ((_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->pipe_offsets[(PLANE_B)] - (_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->pipe_offsets[PIPE_A] + ((_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->mmio_offset) + (0x70180)) })) & ((u32)(((((1UL))) << (31)) + ((int)(sizeof(struct { int:(-!!((sizeof(int) == sizeof(*(8 ? ((void *)((long)(31) * 0l)) : (int *)8))) && ((31) < 0 || (31) > 31))); }))))))drm_WARN_ON(__intel_de_read(_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display)), ((const i915_reg_t){ .reg = ((_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->pipe_offsets[(PLANE_C)] - (_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->pipe_offsets[PIPE_A] + ((_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display))->info.__device_info)->mmio_offset) + (0x70180)) })) & ((u32)(((((1UL))) << (31)) + ((int)(sizeof(struct { int:(-!!((sizeof(int) == sizeof(*(8 ? ((void *)((long)(31) * 0l)) : (int *)8))) && ((31) < 0 || (31) > 31))); }))))))drm_WARN_ON(__intel_de_read(_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display)), ((const i915_reg_t){ .reg = ((_Generic((display), const struct drm_i915_private *: (&((const struct drm_i915_private *)((display)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)((display)))->display), const struct intel_display *: ((display)), struct intel_display *: ((display)))->info.__device_info)->cursor_offsets[((PIPE_A))] - (_Generic((display), const struct drm_i915_private *: (&((const struct drm_i915_private *)((display)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)((display)))->display), const struct intel_display *: ((display)), struct intel_display *: ((display)))->info.__device_info)->cursor_offsets[PIPE_A] + ((_Generic((display), const struct drm_i915_private *: (&((const struct drm_i915_private *)((display)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)((display)))->display), const struct intel_display *: ((display)), struct intel_display *: ((display)))->info.__device_info)->mmio_offset) + (0x70080)) })) & 0x27)drm_WARN_ON(__intel_de_read(_Generic(display, const struct drm_i915_private *: (&((const struct drm_i915_private *)(display))->display), struct drm_i915_private *: (&((struct drm_i915_private *)(display))->display), const struct intel_display *: (display), struct intel_display *: (display)), ((const i915_reg_t){ .reg = ((_Generic((display), const struct drm_i915_private *: (&((const struct drm_i915_private *)((display)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)((display)))->display), const struct intel_display *: ((display)), struct intel_display *: ((display)))->info.__device_info)->cursor_offsets[((PIPE_B))] - (_Generic((display), const struct drm_i915_private *: (&((const struct drm_i915_private *)((display)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)((display)))->display), const struct intel_display *: ((display)), struct intel_display *: ((display)))->info.__device_info)->cursor_offsets[PIPE_A] + ((_Generic((display), const struct drm_i915_private *: (&((const struct drm_i915_private *)((display)))->display), struct drm_i915_private *: (&((struct drm_i915_private *)((display)))->display), const struct intel_display *: ((display)), struct intel_display *: ((display)))->info.__device_info)->mmio_offset) + (0x70080)) })) & 0x27) k   3          /   w b    E     5         t l = P  x       t  ? ^ K a k j  ! ! ! ! " " $$$$$i915.import_ns=PWMGCC: (Debian 12.2.0-14) 12.2.0GNU|)G@a} _%0 6 eT@ f`} 4: :Mpimzp 'F^pzPp0 0"$0)k 4%p99;N? b@8mN~R<V`Yjpq`v ~'0 @ PWn:@A&,+0 @0070I0\?mn@09KYju '9Rs  3 T z       / @ Q j s       * B [ r        9 N c y     Je   K K$ 4 D LSW Mq 0M! pMJ ME 0NO  -PP2LP.fPUPQUQ+R,@R, R(':XoV @VCPW@[m\*Nex`c!dV6pdDMd-ce$xPeMe;ffm +Qaw hehPi" j;Ql=Nmt+`wa>w_NPx`xr yyzyz+z~`{|,"HkP| 7C[m)Yq %:Vt'AUi,K]k 4bP&A^xO@=| u#9Rcsp!%<O^ t0P|u0?Y % 9 T c z   д;  4  !'!@!^!y!!!@!!!"+"="qU"`:v"X+""""""#?#X#o######$#$?$_$u$$$$$$%/%@%W%r%%%%%% &$&;&S& op&&&&&&'$'7'V'r''$n''''(E(b(((((P'(('g)( )-)B)])i)w))))))) **,*:* 4K*5k*p6d*6n*p7***++3+L+p9c]+s++++++pB:+F++,,,GG,e,,,,,intel_display.cintel_crtc_vrr_enablingintel_encoders_pre_pll_enableintel_encoders_pre_enableintel_encoders_post_disableintel_encoders_post_pll_disableintel_cpu_transcoders_need_modesetassert_planepipe_config_mismatchpipe_config_infoframe_mismatchintel_crtc_add_planes_to_stateicl_check_nv12_planesintel_old_crtc_state_disablesintel_enable_crtcintel_encoders_disableintel_encoders_enableintel_crtc_compute_pixel_ratepipe_config_dp_as_sdp_mismatch.constprop.0intel_splitter_adjust_timings.isra.0needs_async_flip_vtd_wa.isra.0intel_atomic_cleanup_workintel_modeset_pipeintel_joiner_adjust_timingsintel_joiner_adjust_pipe_srcintel_crtc_readout_derived_stateis_bigjoiner.isra.0intel_crtc_copy_uapi_to_hw_state_nomodesetintel_crtc_copy_uapi_to_hw_state_modesetintel_async_flip_vtd_waintel_get_pipe_src_size.isra.0intel_set_pipe_src_sizeicl_set_pipe_chicken.isra.0ilk_pfit_enabletranscoder_ddi_func_is_enabledbdw_set_pipe_miscilk_get_pfit_configintel_set_transcoder_timingsenabled_joiner_pipesintel_get_transcoder_timings.isra.0ilk_get_pipe_configi9xx_get_pipe_confighsw_get_pipe_configCSWTCH.384hsw_crtc_disableintel_crtc_compute_configcopy_joiner_crtc_state_nomodeseti9xx_pfit_enable.LC20intel_pre_plane_updateintel_pre_update_crtcilk_crtc_disableintel_atomic_commit_tailintel_atomic_commit_workhsw_crtc_enablei9xx_configure_cpu_transcoderi9xx_crtc_enablevalleyview_crtc_enableilk_crtc_enableCSWTCH.459intel_update_crtcintel_commit_modeset_enablesskl_commit_modeset_enablesskl_display_funcsddi_display_funcspch_split_display_funcsvlv_display_funcsi9xx_display_funcsi9xx_crtc_disable__UNIQUE_ID_import_ns996__UNIQUE_ID___addressable___SCK__tp_func_i915_reg_rw943.0__UNIQUE_ID___addressable___SCK__preempt_schedule_notrace41.1.LC3__x86_return_thunk__x86_indirect_thunk_rax_dev_errdev_driver_string__warn_printk__stack_chk_faildrm_printf__drm_debughdmi_infoframe_logdrm_atomic_get_plane_stateicl_is_nv12_y_plane__drm_dev_dbgintel_plane_copy_hw_stateicl_is_hdr_plane__sw_hweight32intel_crtc_disable_pipe_crcintel_fbc_disableintel_initial_watermarksintel_crtc_update_active_timingsintel_crtc_enable_pipe_crcintel_opregion_notify_encoderintel_adjusted_rate__drm_printfn_dbgdrm_dp_as_sdp_log__drm_printfn_erri915_vtd_activeintel_dsb_cleanupintel_color_cleanup_commitdrm_atomic_helper_cleanup_planesdrm_atomic_helper_commit_cleanup_done__drm_atomic_state_freerefcount_warn_saturatedrm_atomic_add_affected_connectorsintel_dp_mst_add_topology_state_for_crtcdrm_mode_copydrm_mode_set_namedrm_property_replace_blobintel_dmc_wl_getintel_dmc_wl_put__tracepoint_i915_reg_rwpcpu_hot__cpu_online_mask__SCT__tp_func_i915_reg_rw__SCT__preempt_schedule_notraceintel_display_power_get_if_enabled__intel_display_power_put_asyncintel_dsb_reg_writeicl_hdr_plane_mask__x86_indirect_thunk_r9__x86_indirect_thunk_r10intel_dsc_power_domainintel_color_get_configilk_pch_get_configintel_display_power_put_uncheckedi9xx_dpll_get_hw_statevlv_crtc_clock_geti9xx_crtc_clock_getchv_crtc_clock_getintel_display_power_get_in_set_if_enabledintel_dsc_get_configintel_vrr_get_configskl_scaler_get_confighsw_ips_get_confighsw_chicken_trans_regintel_display_power_put_mask_in_setbxt_dsi_pll_is_enabledvlv_get_hpll_vcovlv_cck_readvlv_get_cck_clockvlv_get_cck_clock_hpllvlv_iosf_sb_getvlv_iosf_sb_putintel_update_czclkis_trans_port_sync_masteris_trans_port_sync_modeintel_crtc_is_bigjoiner_primaryintel_crtc_is_bigjoiner_secondary_intel_modeset_primary_pipesintel_crtc_for_pipeintel_disable_shared_dpllintel_dmc_disable_pipe_intel_modeset_secondary_pipesintel_crtc_is_ultrajoinerintel_crtc_is_ultrajoiner_primaryintel_crtc_ultrajoiner_enable_neededintel_crtc_joiner_secondary_pipesintel_crtc_is_joiner_secondaryintel_crtc_is_joiner_primaryintel_crtc_num_joined_pipesintel_vrr_possibleintel_dpll_crtc_compute_clockilk_fdi_compute_configintel_is_dual_link_lvdsintel_crtc_joined_pipe_maskintel_primary_crtcassert_transcodervlv_wait_port_ready__intel_wait_for_registerintel_enable_transcoderintel_crtc_max_vblank_countintel_wait_for_pipe_scanline_movingassert_dsi_pll_enabledassert_pll_enabledintel_crtc_pch_transcoderassert_fdi_rx_pll_enabledassert_fdi_tx_pll_enabledintel_disable_transcoderintel_wait_for_pipe_scanline_stoppedintel_rotation_info_sizeintel_remapped_info_sizeintel_plane_uses_fenceintel_fb_xy_to_linearintel_add_fb_offsetsintel_plane_fb_max_strideintel_first_crtcintel_set_plane_visibleintel_plane_fixup_bitmasksintel_plane_disable_noatomicintel_plane_disable_armintel_crtc_wait_for_next_vblankintel_set_cpu_fifo_underrun_reportinghsw_ips_disableintel_set_memory_cxsrintel_plane_fence_y_offsetintel_plane_adjust_aligned_offsetintel_has_pending_fb_unpin_raw_spin_locktry_wait_for_completion_raw_spin_unlockintel_get_crtc_new_encoderintel_crtc_vrr_disablingintel_drrs_deactivateintel_psr_pre_plane_updatehsw_ips_pre_updateintel_fbc_pre_update__x86_indirect_thunk_rcxilk_disable_cxsrintel_plane_async_flipintel_vrr_disableintel_update_watermarksmemcmpintel_color_load_lutsintel_vrr_set_transcoder_timingsintel_fbc_updateintel_display_power_is_enabledintel_color_commit_noarmintel_crtc_planes_update_noarmintel_dpt_configureilk_pfit_disableintel_set_pch_fifo_underrun_reportingintel_crtc_vblank_offilk_pch_disableilk_pch_post_disableintel_phy_is_combointel_phy_is_tcintel_phy_is_snpsintel_port_to_phyintel_port_to_tcintel_encoder_to_phyintel_encoder_is_combointel_encoder_is_snpsintel_encoder_is_tcintel_encoder_to_tcintel_aux_power_domainintel_tc_port_in_tbt_alt_modeintel_display_power_legacy_aux_domainintel_display_power_tbt_aux_domainintel_modeset_get_crtc_power_domains__bitmap_andnotintel_display_power_get_in_setintel_color_prepare_commiti915_fence_context_timeoutdma_fence_wait_timeoutdma_fence_releaseintel_fb_rc_ccs_cc_planeintel_fb_bointel_bo_read_from_pageintel_dsb_prepareintel_dsb_vblank_evadeintel_color_commit_armintel_crtc_planes_update_armintel_dsb_chainintel_dsb_finishdrm_atomic_helper_wait_for_dependenciesdrm_dp_mst_atomic_wait_for_dependenciesintel_atomic_global_state_wait_for_dependenciesintel_display_power_getintel_overlay_switch_offintel_frontbuffer_flipdrm_vblank_work_flush_allintel_pmdemand_pre_plane_updateintel_sagv_pre_plane_update_raw_spin_lock_irqdrm_crtc_send_vblank_event_raw_spin_unlock_irqintel_dbuf_pre_plane_updateintel_wait_for_vblank_workersdrm_atomic_helper_wait_for_flip_doneintel_dsb_waitintel_color_wait_commitintel_dbuf_post_plane_updateintel_psr_post_plane_updateintel_fbc_post_updateintel_color_post_updateintel_modeset_verify_crtchsw_ips_post_updateintel_drrs_activateintel_check_cpu_fifo_underrunsintel_check_pch_fifo_underrunsintel_sagv_post_plane_updateintel_pmdemand_post_plane_updatedrm_atomic_helper_commit_hw_doneintel_atomic_global_state_commit_doneintel_runtime_pm_put_uncheckedsystem_highpri_wqqueue_work_onintel_dsb_wait_vblanksintel_dsb_wait_vblank_delayintel_dsb_interruptintel_optimize_watermarksintel_dp_mst_is_slave_transintel_set_cdclk_post_plane_updateintel_uncore_arm_unclaimed_mmio_detectiondrm_atomic_helper_update_legacy_modeset_stateintel_set_cdclk_pre_plane_updateintel_modeset_verify_disabledintel_modeset_put_crtc_power_domainsintel_encoder_destroydrm_encoder_cleanupkfreeintel_encoder_get_configintel_link_compute_m_nintel_dp_link_symbol_clockintel_dp_effective_data_ratedrm_dp_max_dprx_data_rateintel_panel_sanitize_sscintel_zero_m_nintel_set_m_n__x86_indirect_thunk_r8intel_cpu_transcoder_has_m2_n2intel_cpu_transcoder_set_m1_n1intel_cpu_transcoder_set_m2_n2intel_dmc_enable_pipeintel_enable_shared_dpllintel_dsc_enableskl_pfit_enableintel_color_modesetintel_uncompressed_joiner_enablei9xx_set_pipeconfi9xx_enable_pllintel_crtc_vblank_onvlv_enable_pllchv_enable_pllilk_set_pipeconfassert_fdi_tx_disabledassert_fdi_rx_disabledilk_pch_pre_enableilk_pch_enablebdw_get_pipe_misc_bppilk_get_lanes_requiredintel_get_m_nintel_cpu_transcoder_get_m1_n1intel_cpu_transcoder_get_m2_n2intel_crtc_get_pipe_configintel_dotclock_calculateintel_dp_link_symbol_sizeintel_crtc_dotclockintel_encoder_current_modekmalloc_caches__kmalloc_cache_noprofintel_crtc_state_allocintel_crtc_destroy_stateintel_fuzzy_clock_checkintel_pipe_config_compareintel_dpll_compare_hw_stateintel_hdmi_infoframe_enabledrm_dp_vsc_sdp_logintel_dpll_dump_hw_stateintel_cx0pll_compare_hw_stateintel_cx0pll_dump_hw_stateprint_hex_dumpintel_color_lut_equalintel_modeset_pipes_in_mask_earlyintel_atomic_get_crtc_stateintel_modeset_all_pipes_lateintel_modeset_commit_pipesdrm_atomic_state_allocdrm_atomic_commitintel_calc_active_pipesintel_atomic_add_affected_planesintel_atomic_checkintel_display_driver_check_accessintel_vrr_check_modesetdrm_atomic_helper_check_modesetintel_link_bw_init_limitsintel_link_bw_set_bpp_limit_for_pipeintel_fdi_add_affected_crtcsintel_crtc_free_hw_statedrm_mode_get_hv_timingintel_vrr_compute_config_lateintel_link_bw_atomic_checkkmemdup_noprofdrm_mode_set_crtcinfointel_release_shared_dpllsdrm_connector_list_iter_begindrm_connector_list_iter_nextdrm_connector_list_iter_endintel_dp_mst_crtc_needs_modesetintel_crtc_state_dumpintel_plane_atomic_checkintel_compute_global_watermarksintel_bw_atomic_checkintel_cdclk_atomic_checkintel_any_crtc_needs_modesetintel_modeset_calc_cdclkintel_pmdemand_atomic_checkintel_wm_computeskl_update_scaler_crtcintel_atomic_setup_scalershsw_ips_compute_confighsw_crtc_supports_ipsintel_atomic_get_cdclk_stateintel_psr2_sel_fetch_updateintel_dpll_crtc_get_shared_dpllintel_color_checkskl_watermark_ipc_enabledintel_fbc_atomic_checkintel_color_assert_lutsintel_crtc_arm_fifo_underrunintel_crtc_prepare_vblank_eventintel_dsb_commitintel_pipe_update_startintel_psr2_program_trans_man_trk_ctlintel_atomic_update_watermarksintel_pipe_update_endintel_vrr_enableskl_detach_scalersintel_dbuf_mbus_pre_ddb_updateskl_ddb_allocation_overlapsintel_dbuf_mbus_post_ddb_updateintel_atomic_commitintel_runtime_pm_getdrm_atomic_helper_prepare_planesdrm_atomic_helper_setup_commitdrm_atomic_helper_unprepare_planesintel_atomic_global_state_setup_commitdrm_atomic_helper_swap_stateintel_atomic_swap_global_st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