ELF>C@@U bHSHHXHHXH1ҹbHp H1ҹp,HXbHXH1ҹbHPH1ҹbHHX []ff.UpbSHHHXHHXH1ҹbHHX []UHaSHH8HaH HX tHXH!HXH!HHX HHX HHX []UbSHHHXHHHX HHX H@@HX []fD HXLLHHtHwH1ff.fSHHǨH8]A? t HHtHsH1[[ff.UHSHH8HH HX[]DAUATLUHSH8$LL$AHXH"ھH"%? €@H"HX]LA\$A]@AVAULATU1SH Hru[]A\A]A^Hp HcLLr H,DD+`0Dd0DH8DL@HXHp LH,DD+`0F$DH8DLHXHp 1LH,+p0B4H8!UH1ҹSHHXbHHHXbHX1HbH%Hp ҋp,HX bH[]BfUH SHH8HH %HXHHXP HH8H HXH0H8H0@HXH߾&[]}ff.fU$ HSHHXHHHXH0H8H0HXH HXH H8H HXHHX` []fDAU@` ATE1UHSHHXH HH8 H߃HX LseEHH8A AdDDH%߉ * EHX AAuE1Ls%DH HX`AAt LrAAu[]A\A]fU HSHHXHH H8H  HXHH8H HXHHXH H8H  `HXH H8H  `HXH H8 H HXHeH=H[]U HSHHXH HH8 H @HX$HHX HHxHXtHHX HHX0HH80HHXHH H8 H%HX ptHH[]ff.UHStH$f=t9H`H8H`HX[]H8H  HHXAU ATLU1SHH8L L @HX LH8 L̀HX HuL0H8L0HXL@H8L@@HXH[]A\A]ED, LH8DDL̀HX<DAU ATE1UHSHH8H H @HX@HH8@H@HX HH8 H̀HX L#AAuH H8H %HXHHXP H0H8H0@HXH߾LHH8  H@HXH=HH8H HX[]A\A]F, HH8DDHHXff.UHSHH@H H8Hタ HXH0dH8H0d HXHPH8HP HX[]H8Hタ  H̀HXff.USHHHH80H0@HXH0H8H0 HXH0eH8H0e`HXHﺶHX` HPH8HP̀HX[]ff.fUSHHHH80eH0e`HX[]fUHSpHtzH/HH8DHD @HXHPH8HP̀HX[]H8H  H HXJUSHH[HH8$H$HXHDH8HD @HXHPH8HP̀HX[]fU `HSHHXHHHX$` HH8 H `HXPHH8PH̀HXt H@uHXHﺠ H H8 H HXHHXH[ ]H H8H  @HXH H8 H @HX ATUSHHHDH8DH @HXtt?<vyH8HPHP̀HX[]A\H{LgPMHLHH w70HH80H@HXCtGH8/HH @HXH{LgPMt/HLHH |L'L'ff.@HhHff.fHuH`t HhHuHuHuHuHuHuH@uHxH etgtnHAHƀ1H@!tBH HHHEHHHNo clock gating settings or workarounds applied. Wrong MCH_SSKPD value: 0x%08x This can cause underruns. drm_WARN_ON(((&(i915)->__runtime)->step.graphics_step) == STEP_NONE)drivers/gpu/drm/i915/intel_clock_gating.c%s %s: [drm] %s  GCC: (Debian 12.2.0-14) 12.2.0GNU/iGp^pu)P#RK`0 @5K >a` }x  0[2@N)?PU0kxph `#X:PQHh0( @8(@E^l@[intel_clock_gating.ci965gm_init_clock_gatingi965g_init_clock_gatinggen3_init_clock_gatingi85x_init_clock_gatingi830_init_clock_gatingnop_init_clock_gatinggen6_check_mch_setupdg2_init_clock_gatinggen8_set_l3sqc_credits.constprop.0g4x_disable_trickle_feedg4x_init_clock_gatingchv_init_clock_gatingvlv_init_clock_gatingcpt_init_clock_gatinggen6_init_clock_gatingivb_init_clock_gatinglpt_init_clock_gatinghsw_init_clock_gatingbdw_init_clock_gatinggen9_init_clock_gatingbxt_init_clock_gatingglk_init_clock_gatingcfl_init_clock_gatingskl_init_clock_gatingilk_init_clock_gatingkbl_init_clock_gatingdg2_clock_gating_funcscfl_clock_gating_funcsskl_clock_gating_funcskbl_clock_gating_funcsbxt_clock_gating_funcsglk_clock_gating_funcsbdw_clock_gating_funcschv_clock_gating_funcshsw_clock_gating_funcsivb_clock_gating_funcsvlv_clock_gating_funcsg4x_clock_gating_funcsi965gm_clock_gating_funcsi965g_clock_gating_funcsi85x_clock_gating_funcsi830_clock_gating_funcsnop_clock_gating_funcsgen6_clock_gating_funcsilk_clock_gating_funcsgen3_clock_gating_funcs.LC4__x86_indirect_thunk_rax__drm_dev_dbg__x86_return_thunkintel_gt_mcr_read_anyintel_gt_mcr_multicast_write__const_udelaydev_driver_string__warn_printkintel_clock_gating_initintel_clock_gating_hooks_init:5U5{5555555555545555c 5 8%555898:5555'5g5555%5E5c5|5555*5H5a55555= 5V 5t 5 5 5 5 5 5 5 5 5 50 5P 5i 5 5 5 5 53 5S 5q 5 5 5 5 5 50 5V 5 5 55[5{55555595f55555#5<5Z555555)5G5h555"5@5Y5w5555:5X5q555555j5555H5f555555z555555<5U5u55555\5|55; x <&5D5~55; x <G 3] 3x 3 3 3x 3p 3h 3` 3X 3P 3H 30+ 3(; 3 S 3c 3j 3z 3@ 38 35U5T5555o667G55b75J 7 55555/5:5555q7`` (@08@PH P0X`h pP x   0p@ 0 4 4   Ppp (0@8P@` HP X0`hp@x0.symtab.strtab.shstrtab.rela.text.data.bss.rela__patchable_function_entries.rodata.str1.8.rodata.str1.1.rela.discard.instr_begin.rela__bug_table.rela.discard.reachable.rela.discard.instr_end.rela.rodata.comment.note.GNU-stack.note.gnu.property @@)8&,61@=S2b2vq@?` @@` @x@0 @@`@A0  5 $B