// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/N2H SoC
 *
 * Copyright (C) 2025 Renesas Electronics Corp.
 */

#include <dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	compatible = "renesas,r9a09g087";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a55";
			reg = <0>;
			device_type = "cpu";
			next-level-cache = <&L3_CA55>;
			enable-method = "psci";
		};

		cpu1: cpu@100 {
			compatible = "arm,cortex-a55";
			reg = <0x100>;
			device_type = "cpu";
			next-level-cache = <&L3_CA55>;
			enable-method = "psci";
		};

		cpu2: cpu@200 {
			compatible = "arm,cortex-a55";
			reg = <0x200>;
			device_type = "cpu";
			next-level-cache = <&L3_CA55>;
			enable-method = "psci";
		};

		cpu3: cpu@300 {
			compatible = "arm,cortex-a55";
			reg = <0x300>;
			device_type = "cpu";
			next-level-cache = <&L3_CA55>;
			enable-method = "psci";
		};

		L3_CA55: cache-controller-0 {
			compatible = "cache";
			cache-unified;
			cache-size = <0x100000>;
			cache-level = <3>;
		};
	};

	extal_clk: extal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board */
		clock-frequency = <0>;
	};

	pmu {
		compatible = "arm,cortex-a55-pmu";
		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
	};

	psci {
		compatible = "arm,psci-1.0", "arm,psci-0.2";
		method = "smc";
	};

	soc: soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		sci0: serial@80005000 {
			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";
			reg = <0 0x80005000 0 0x400>;
			interrupts = <GIC_SPI 590 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 591 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 592 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eri", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 8>, <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			clock-names = "operation", "bus";
			power-domains = <&cpg>;
			status = "disabled";
		};

		sci1: serial@80005400 {
			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";
			reg = <0 0x80005400 0 0x400>;
			interrupts = <GIC_SPI 594 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 595 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 596 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 597 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eri", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 9>, <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			clock-names = "operation", "bus";
			power-domains = <&cpg>;
			status = "disabled";
		};

		sci2: serial@80005800 {
			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";
			reg = <0 0x80005800 0 0x400>;
			interrupts = <GIC_SPI 598 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 599 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 600 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eri", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 10>, <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			clock-names = "operation", "bus";
			power-domains = <&cpg>;
			status = "disabled";
		};

		sci3: serial@80005c00 {
			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";
			reg = <0 0x80005c00 0 0x400>;
			interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 603 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 604 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eri", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 11>, <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			clock-names = "operation", "bus";
			power-domains = <&cpg>;
			status = "disabled";
		};

		sci4: serial@80006000 {
			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";
			reg = <0 0x80006000 0 0x400>;
			interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 607 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 608 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 609 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eri", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 12>, <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			clock-names = "operation", "bus";
			power-domains = <&cpg>;
			status = "disabled";
		};

		sci5: serial@81005000 {
			compatible = "renesas,r9a09g087-rsci", "renesas,r9a09g077-rsci";
			reg = <0 0x81005000 0 0x400>;
			interrupts = <GIC_SPI 610 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 611 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 612 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 613 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eri", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 600>, <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			clock-names = "operation", "bus";
			power-domains = <&cpg>;
			status = "disabled";
		};

		wdt0: watchdog@80082000 {
			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";
			reg = <0 0x80082000 0 0x400>,
			      <0 0x81295100 0 0x04>;
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>;
			clock-names = "pclk";
			power-domains = <&cpg>;
			status = "disabled";
		};

		wdt1: watchdog@80082400 {
			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";
			reg = <0 0x80082400 0 0x400>,
			      <0 0x81295104 0 0x04>;
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>;
			clock-names = "pclk";
			power-domains = <&cpg>;
			status = "disabled";
		};

		wdt2: watchdog@80082800 {
			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";
			reg = <0 0x80082800 0 0x400>,
			      <0 0x81295108 0 0x04>;
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>;
			clock-names = "pclk";
			power-domains = <&cpg>;
			status = "disabled";
		};

		wdt3: watchdog@80082c00 {
			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";
			reg = <0 0x80082c00 0 0x400>,
			      <0 0x8129510c 0 0x04>;
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>;
			clock-names = "pclk";
			power-domains = <&cpg>;
			status = "disabled";
		};

		wdt4: watchdog@80083000 {
			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";
			reg = <0 0x80083000 0 0x400>,
			      <0 0x81295110 0 0x04>;
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>;
			clock-names = "pclk";
			power-domains = <&cpg>;
			status = "disabled";
		};

		wdt5: watchdog@80083400 {
			compatible = "renesas,r9a09g087-wdt", "renesas,r9a09g077-wdt";
			reg = <0 0x80083400 0 0x400>,
			      <0 0x81295114 0 0x04>;
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>;
			clock-names = "pclk";
			power-domains = <&cpg>;
			status = "disabled";
		};

		i2c0: i2c@80088000 {
			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
			reg = <0 0x80088000 0 0x400>;
			interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 615 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 616 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 617 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eei", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 100>;
			power-domains = <&cpg>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c1: i2c@80088400 {
			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
			reg = <0 0x80088400 0 0x400>;
			interrupts = <GIC_SPI 618 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 619 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 620 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 621 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eei", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 101>;
			power-domains = <&cpg>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c2: i2c@81008000 {
			compatible = "renesas,riic-r9a09g087", "renesas,riic-r9a09g077";
			reg = <0 0x81008000 0 0x400>;
			interrupts = <GIC_SPI 622 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 623 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 624 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 625 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "eei", "rxi", "txi", "tei";
			clocks = <&cpg CPG_MOD 601>;
			power-domains = <&cpg>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		gmac0: ethernet@80100000 {
			compatible = "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth",
				     "snps,dwmac-5.20";
			reg = <0 0x80100000 0 0x10000>;
			interrupts = <GIC_SPI 498 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 499 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 511 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 516 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 502 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 503 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
					  "rx-queue-0", "rx-queue-1", "rx-queue-2",
					  "rx-queue-3", "rx-queue-4", "rx-queue-5",
					  "rx-queue-6", "rx-queue-7", "tx-queue-0",
					  "tx-queue-1", "tx-queue-2", "tx-queue-3",
					  "tx-queue-4", "tx-queue-5", "tx-queue-6",
					  "tx-queue-7";
			clocks = <&cpg CPG_MOD 400>,
				 <&cpg CPG_CORE R9A09G087_CLK_PCLKH>,
				 <&cpg CPG_CORE R9A09G087_ETCLKB>;
			clock-names = "stmmaceth", "pclk", "tx";
			resets = <&cpg 400>, <&cpg 401>;
			reset-names = "stmmaceth", "ahb";
			power-domains = <&cpg>;
			snps,multicast-filter-bins = <256>;
			snps,perfect-filter-entries = <32>;
			rx-fifo-depth = <8192>;
			tx-fifo-depth = <8192>;
			snps,fixed-burst;
			snps,no-pbl-x8;
			snps,force_thresh_dma_mode;
			snps,axi-config = <&stmmac_axi_setup>;
			snps,mtl-rx-config = <&mtl_rx_setup0>;
			snps,mtl-tx-config = <&mtl_tx_setup0>;
			snps,txpbl = <16>;
			snps,rxpbl = <16>;
			status = "disabled";

			mdio0: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};

			mtl_rx_setup0: rx-queues-config {
				snps,rx-queues-to-use = <8>;
				snps,rx-sched-sp;

				queue0 {
					snps,dcb-algorithm;
					snps,priority = <0x1>;
					snps,map-to-dma-channel = <0>;
				};

				queue1 {
					snps,dcb-algorithm;
					snps,priority = <0x2>;
					snps,map-to-dma-channel = <1>;
				};

				queue2 {
					snps,dcb-algorithm;
					snps,priority = <0x4>;
					snps,map-to-dma-channel = <2>;
				};

				queue3 {
					snps,dcb-algorithm;
					snps,priority = <0x8>;
					snps,map-to-dma-channel = <3>;
				};

				queue4 {
					snps,dcb-algorithm;
					snps,priority = <0x10>;
					snps,map-to-dma-channel = <4>;
				};

				queue5 {
					snps,dcb-algorithm;
					snps,priority = <0x20>;
					snps,map-to-dma-channel = <5>;
				};

				queue6 {
					snps,dcb-algorithm;
					snps,priority = <0x40>;
					snps,map-to-dma-channel = <6>;
				};

				queue7 {
					snps,dcb-algorithm;
					snps,priority = <0x80>;
					snps,map-to-dma-channel = <7>;
				};
			};

			mtl_tx_setup0: tx-queues-config {
				snps,tx-queues-to-use = <8>;

				queue0 {
					snps,dcb-algorithm;
				};

				queue1 {
					snps,dcb-algorithm;
				};

				queue2 {
					snps,dcb-algorithm;
				};

				queue3 {
					snps,dcb-algorithm;
				};

				queue4 {
					snps,dcb-algorithm;
				};

				queue5 {
					snps,dcb-algorithm;
				};

				queue6 {
					snps,dcb-algorithm;
				};

				queue7 {
					snps,dcb-algorithm;
				};
			};
		};

		gmac1: ethernet@92000000 {
			compatible = "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth",
				     "snps,dwmac-5.20";
			reg = <0 0x92000000 0 0x10000>;
			interrupts = <GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 519 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 518 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 528 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 521 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 522 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 525 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 526 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 527 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
					  "rx-queue-0", "rx-queue-1", "rx-queue-2",
					  "rx-queue-3", "rx-queue-4", "rx-queue-5",
					  "rx-queue-6", "rx-queue-7", "tx-queue-0",
					  "tx-queue-1", "tx-queue-2", "tx-queue-3",
					  "tx-queue-4", "tx-queue-5", "tx-queue-6",
					  "tx-queue-7";
			clocks = <&cpg CPG_MOD 416>,
				 <&cpg CPG_CORE R9A09G087_CLK_PCLKAH>,
				 <&cpg CPG_CORE R9A09G087_ETCLKB>;
			clock-names = "stmmaceth", "pclk", "tx";
			resets = <&cpg 416>, <&cpg 417>;
			reset-names = "stmmaceth", "ahb";
			power-domains = <&cpg>;
			snps,multicast-filter-bins = <256>;
			snps,perfect-filter-entries = <32>;
			rx-fifo-depth = <8192>;
			tx-fifo-depth = <8192>;
			snps,fixed-burst;
			snps,no-pbl-x8;
			snps,force_thresh_dma_mode;
			snps,axi-config = <&stmmac_axi_setup>;
			snps,mtl-rx-config = <&mtl_rx_setup1>;
			snps,mtl-tx-config = <&mtl_tx_setup1>;
			snps,txpbl = <16>;
			snps,rxpbl = <16>;
			status = "disabled";

			mdio1: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};

			mtl_rx_setup1: rx-queues-config {
				snps,rx-queues-to-use = <8>;
				snps,rx-sched-sp;

				queue0 {
					snps,dcb-algorithm;
					snps,priority = <0x1>;
					snps,map-to-dma-channel = <0>;
				};

				queue1 {
					snps,dcb-algorithm;
					snps,priority = <0x2>;
					snps,map-to-dma-channel = <1>;
				};

				queue2 {
					snps,dcb-algorithm;
					snps,priority = <0x4>;
					snps,map-to-dma-channel = <2>;
				};

				queue3 {
					snps,dcb-algorithm;
					snps,priority = <0x8>;
					snps,map-to-dma-channel = <3>;
				};

				queue4 {
					snps,dcb-algorithm;
					snps,priority = <0x10>;
					snps,map-to-dma-channel = <4>;
				};

				queue5 {
					snps,dcb-algorithm;
					snps,priority = <0x20>;
					snps,map-to-dma-channel = <5>;
				};

				queue6 {
					snps,dcb-algorithm;
					snps,priority = <0x40>;
					snps,map-to-dma-channel = <6>;
				};

				queue7 {
					snps,dcb-algorithm;
					snps,priority = <0x80>;
					snps,map-to-dma-channel = <7>;
				};
			};

			mtl_tx_setup1: tx-queues-config {
				snps,tx-queues-to-use = <8>;

				queue0 {
					snps,dcb-algorithm;
				};

				queue1 {
					snps,dcb-algorithm;
				};

				queue2 {
					snps,dcb-algorithm;
				};

				queue3 {
					snps,dcb-algorithm;
				};

				queue4 {
					snps,dcb-algorithm;
				};

				queue5 {
					snps,dcb-algorithm;
				};

				queue6 {
					snps,dcb-algorithm;
				};

				queue7 {
					snps,dcb-algorithm;
				};
			};
		};

		gmac2: ethernet@92010000 {
			compatible = "renesas,r9a09g087-gbeth", "renesas,r9a09g077-gbeth",
				     "snps,dwmac-5.20";
			reg = <0 0x92010000 0 0x10000>;
			interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 554 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq", "eth_wake_irq", "eth_lpi",
					  "rx-queue-0", "rx-queue-1", "rx-queue-2",
					  "rx-queue-3", "rx-queue-4", "rx-queue-5",
					  "rx-queue-6", "rx-queue-7", "tx-queue-0",
					  "tx-queue-1", "tx-queue-2", "tx-queue-3",
					  "tx-queue-4", "tx-queue-5", "tx-queue-6",
					  "tx-queue-7";
			clocks = <&cpg CPG_MOD 417>,
				 <&cpg CPG_CORE R9A09G087_CLK_PCLKAH>,
				 <&cpg CPG_CORE R9A09G087_ETCLKB>;
			clock-names = "stmmaceth", "pclk", "tx";
			resets = <&cpg 418>, <&cpg 419>;
			reset-names = "stmmaceth", "ahb";
			power-domains = <&cpg>;
			snps,multicast-filter-bins = <256>;
			snps,perfect-filter-entries = <32>;
			rx-fifo-depth = <8192>;
			tx-fifo-depth = <8192>;
			snps,fixed-burst;
			snps,no-pbl-x8;
			snps,force_thresh_dma_mode;
			snps,axi-config = <&stmmac_axi_setup>;
			snps,mtl-rx-config = <&mtl_rx_setup2>;
			snps,mtl-tx-config = <&mtl_tx_setup2>;
			snps,txpbl = <16>;
			snps,rxpbl = <16>;
			status = "disabled";

			mdio2: mdio {
				compatible = "snps,dwmac-mdio";
				#address-cells = <1>;
				#size-cells = <0>;
			};

			mtl_rx_setup2: rx-queues-config {
				snps,rx-queues-to-use = <8>;
				snps,rx-sched-sp;

				queue0 {
					snps,dcb-algorithm;
					snps,priority = <0x1>;
					snps,map-to-dma-channel = <0>;
				};

				queue1 {
					snps,dcb-algorithm;
					snps,priority = <0x2>;
					snps,map-to-dma-channel = <1>;
				};

				queue2 {
					snps,dcb-algorithm;
					snps,priority = <0x4>;
					snps,map-to-dma-channel = <2>;
				};

				queue3 {
					snps,dcb-algorithm;
					snps,priority = <0x8>;
					snps,map-to-dma-channel = <3>;
				};

				queue4 {
					snps,dcb-algorithm;
					snps,priority = <0x10>;
					snps,map-to-dma-channel = <4>;
				};

				queue5 {
					snps,dcb-algorithm;
					snps,priority = <0x20>;
					snps,map-to-dma-channel = <5>;
				};

				queue6 {
					snps,dcb-algorithm;
					snps,priority = <0x40>;
					snps,map-to-dma-channel = <6>;
				};

				queue7 {
					snps,dcb-algorithm;
					snps,priority = <0x80>;
					snps,map-to-dma-channel = <7>;
				};
			};

			mtl_tx_setup2: tx-queues-config {
				snps,tx-queues-to-use = <8>;

				queue0 {
					snps,dcb-algorithm;
				};

				queue1 {
					snps,dcb-algorithm;
				};

				queue2 {
					snps,dcb-algorithm;
				};

				queue3 {
					snps,dcb-algorithm;
				};

				queue4 {
					snps,dcb-algorithm;
				};

				queue5 {
					snps,dcb-algorithm;
				};

				queue6 {
					snps,dcb-algorithm;
				};

				queue7 {
					snps,dcb-algorithm;
				};
			};
		};

		ethss: ethss@80110000 {
			compatible = "renesas,r9a09g087-miic", "renesas,r9a09g077-miic";
			reg =  <0 0x80110000 0 0x10000>;
			clocks = <&cpg CPG_CORE R9A09G087_ETCLKE>,
				 <&cpg CPG_CORE R9A09G087_ETCLKB>,
				 <&cpg CPG_CORE R9A09G087_ETCLKD>,
				 <&cpg CPG_MOD 403>;
			clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";
			resets = <&cpg 405>, <&cpg 406>;
			reset-names = "rst", "crst";
			power-domains = <&cpg>;
			status = "disabled";

			#address-cells = <1>;
			#size-cells = <0>;

			mii_conv0: mii-conv@0 {
				reg = <0>;
				status = "disabled";
			};

			mii_conv1: mii-conv@1 {
				reg = <1>;
				status = "disabled";
			};

			mii_conv2: mii-conv@2 {
				reg = <2>;
				status = "disabled";
			};

			mii_conv3: mii-conv@3 {
				reg = <3>;
				status = "disabled";
			};
		};

		cpg: clock-controller@80280000 {
			compatible = "renesas,r9a09g087-cpg-mssr";
			reg = <0 0x80280000 0 0x1000>,
			      <0 0x81280000 0 0x9000>;
			clocks = <&extal_clk>;
			clock-names = "extal";
			#clock-cells = <2>;
			#reset-cells = <1>;
			#power-domain-cells = <0>;
		};

		pinctrl: pinctrl@802c0000 {
			compatible = "renesas,r9a09g087-pinctrl";
			reg = <0 0x802c0000 0 0x10000>,
			      <0 0x812c0000 0 0x10000>,
			      <0 0x802b0000 0 0x10000>;
			reg-names = "nsr", "srs", "srn";
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKM>;
			gpio-controller;
			#gpio-cells = <2>;
			gpio-ranges = <&pinctrl 0 0 280>;
			power-domains = <&cpg>;
		};

		gic: interrupt-controller@83000000 {
			compatible = "arm,gic-v3";
			reg = <0x0 0x83000000 0 0x40000>,
			      <0x0 0x83040000 0 0x160000>;
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
		};

		adc0: adc@90014000 {
			compatible = "renesas,r9a09g087-adc", "renesas,r9a09g077-adc";
			reg = <0 0x90014000 0 0x400>;
			interrupts = <GIC_SPI 698 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 699 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 700 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 701 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 851 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 852 IRQ_TYPE_EDGE_RISING>;
			interrupt-names = "adi", "gbadi", "gcadi",
					  "cmpai", "cmpbi", "wcmpm", "wcmpum";
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>,
				 <&cpg CPG_MOD 206>;
			clock-names = "adclk", "pclk";
			power-domains = <&cpg>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;
			status = "disabled";
		};

		adc1: adc@90014400 {
			compatible = "renesas,r9a09g087-adc", "renesas,r9a09g077-adc";
			reg = <0 0x90014400 0 0x400>;
			interrupts = <GIC_SPI 703 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 704 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 705 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 706 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 707 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 853 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 854 IRQ_TYPE_EDGE_RISING>;
			interrupt-names = "adi", "gbadi", "gcadi",
					  "cmpai", "cmpbi", "wcmpm", "wcmpum";
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>,
				 <&cpg CPG_MOD 207>;
			clock-names = "adclk", "pclk";
			power-domains = <&cpg>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;
			status = "disabled";
		};

		adc2: adc@80008000 {
			compatible = "renesas,r9a09g087-adc", "renesas,r9a09g077-adc";
			reg = <0 0x80008000 0 0x400>;
			interrupts = <GIC_SPI 708 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 709 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 710 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 711 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 712 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 855 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 856 IRQ_TYPE_EDGE_RISING>;
			interrupt-names = "adi", "gbadi", "gcadi",
					  "cmpai", "cmpbi", "wcmpm", "wcmpum";
			clocks = <&cpg CPG_CORE R9A09G087_CLK_PCLKL>,
				 <&cpg CPG_MOD 225>;
			clock-names = "adclk", "pclk";
			power-domains = <&cpg>;
			#address-cells = <1>;
			#size-cells = <0>;
			#io-channel-cells = <1>;
			status = "disabled";
		};

		ohci: usb@92040000 {
			compatible = "generic-ohci";
			reg = <0 0x92040000 0 0x100>;
			interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 408>;
			phys = <&usb2_phy 1>;
			phy-names = "usb";
			power-domains = <&cpg>;
			status = "disabled";
		};

		ehci: usb@92040100 {
			compatible = "generic-ehci";
			reg = <0 0x92040100 0 0x100>;
			interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 408>;
			phys = <&usb2_phy 2>;
			phy-names = "usb";
			companion = <&ohci>;
			power-domains = <&cpg>;
			status = "disabled";
		};

		usb2_phy: usb-phy@92040200 {
			compatible = "renesas,usb2-phy-r9a09g087", "renesas,usb2-phy-r9a09g077";
			reg = <0 0x92040200 0 0x700>;
			interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 408>,
				 <&cpg CPG_CORE R9A09G087_USB_CLK>;
			#phy-cells = <1>;
			power-domains = <&cpg>;
			status = "disabled";
		};

		hsusb: usb@92041000 {
			compatible = "renesas,usbhs-r9a09g087", "renesas,usbhs-r9a09g077";
			reg = <0 0x92041000 0 0x1000>;
			interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 408>;
			phys = <&usb2_phy 3>;
			phy-names = "usb";
			power-domains = <&cpg>;
			status = "disabled";
		};

		sdhi0: mmc@92080000  {
			compatible = "renesas,sdhi-r9a09g087",
				     "renesas,sdhi-r9a09g057";
			reg = <0x0 0x92080000 0 0x10000>;
			interrupts = <GIC_SPI 782 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 783 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 1212>,
				 <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
			clock-names = "aclk", "clkh";
			power-domains = <&cpg>;
			status = "disabled";

			sdhi0_vqmmc: vqmmc-regulator {
				regulator-name = "SDHI0-VQMMC";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				status = "disabled";
			};
		};

		sdhi1: mmc@92090000 {
			compatible = "renesas,sdhi-r9a09g087",
				     "renesas,sdhi-r9a09g057";
			reg = <0x0 0x92090000 0 0x10000>;
			interrupts = <GIC_SPI 784 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 785 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 1213>,
				 <&cpg CPG_CORE R9A09G087_SDHI_CLKHS>;
			clock-names = "aclk", "clkh";
			power-domains = <&cpg>;
			status = "disabled";

			sdhi1_vqmmc: vqmmc-regulator {
				regulator-name = "SDHI1-VQMMC";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				status = "disabled";
			};
		};
	};

	stmmac_axi_setup: stmmac-axi-config {
		snps,lpi_en;
		snps,wr_osr_lmt = <0xf>;
		snps,rd_osr_lmt = <0xf>;
		snps,blen = <16 8 4 0 0 0 0>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
			     <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
		interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt";
	};
};