// SPDX-License-Identifier: ISC
/*
 * Device Tree file for the USRobotics USR8200 firewall
 * VPN and NAS. Based on know-how from Peter Denison.
 *
 * This machine is based on IXP422, the USR internal codename
 * is "Jeeves".
 */

/dts-v1/;

#include "intel-ixp42x.dtsi"
#include <dt-bindings/input/input.h>

/ {
	model = "USRobotics USR8200";
	compatible = "usr,usr8200", "intel,ixp42x";
	#address-cells = <1>;
	#size-cells = <1>;

	memory@0 {
		device_type = "memory";
		reg = <0x00000000 0x4000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = "uart1:115200n8";
	};

	aliases {
		/* These are switched around */
		serial0 = &uart1;
		serial1 = &uart0;
	};

	leds {
		compatible = "gpio-leds";
		ieee1394_led: led-1394 {
			label = "usr8200:green:1394";
			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
		usb1_led: led-usb1 {
			label = "usr8200:green:usb1";
			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
		usb2_led: led-usb2 {
			label = "usr8200:green:usb2";
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
		wireless_led: led-wireless {
			/*
			 * This LED is mounted inside the case but cannot be
			 * seen from the outside: probably USR planned at one
			 * point for the device to have a wireless card, then
			 * changed their mind and didn't mount it, leaving the
			 * LED in place.
			 */
			label = "usr8200:green:wireless";
			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
			default-state = "off";
		};
		pwr_led: led-pwr {
			label = "usr8200:green:pwr";
			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};
	};

	gpio_keys {
		compatible = "gpio-keys";

		button-reset {
			wakeup-source;
			linux,code = <KEY_RESTART>;
			label = "reset";
			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
		};
	};

	soc {
		bus@c4000000 {
			flash@0,0 {
				compatible = "intel,ixp4xx-flash", "cfi-flash";
				bank-width = <2>;
				/* Enable writes on the expansion bus */
				intel,ixp4xx-eb-write-enable = <1>;
				/* 16 MB of Flash mapped in at CS0 */
				reg = <0 0x00000000 0x1000000>;

				partitions {
					compatible = "redboot-fis";
					/* Eraseblock at 0x0fe0000 */
					fis-index-block = <0x7f>;
				};
			};
			rtc@2,0 {
				/* EPSON RTC7301 DG DIL-capsule */
				compatible = "epson,rtc7301dg";
				/*
				 * These timing settings were found in the boardfile patch:
				 * IXP4XX_EXP_CS2 = 0x3fff000 | IXP4XX_EXP_BUS_SIZE(0) | IXP4XX_EXP_BUS_WR_EN |
				 *                  IXP4XX_EXP_BUS_CS_EN | IXP4XX_EXP_BUS_BYTE_EN;
				 */
				intel,ixp4xx-eb-t1 = <0>; // no cycles extra address phase
				intel,ixp4xx-eb-t2 = <0>; // no cycles extra setup phase
				intel,ixp4xx-eb-t3 = <15>; // 15 cycles extra strobe phase
				intel,ixp4xx-eb-t4 = <3>; // 3 cycles extra hold phase
				intel,ixp4xx-eb-t5 = <15>; // 15 cycles extra recovery phase
				intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle
				intel,ixp4xx-eb-byte-access-on-halfword = <0>;
				intel,ixp4xx-eb-mux-address-and-data = <0>;
				intel,ixp4xx-eb-ahb-split-transfers = <0>;
				intel,ixp4xx-eb-write-enable = <1>;
				intel,ixp4xx-eb-byte-access = <1>;
				/* 512 bytes at CS2 */
				reg = <2 0x00000000 0x0000200>;
				reg-io-width = <1>;
				native-endian;
				/* FIXME: try to check if there is an IRQ for the RTC? */
			};
		};

		pci@c0000000 {
			status = "okay";

			/*
			 * Taken from USR8200 boardfile from OpenWrt
			 *
			 * We have 3 slots (IDSEL) with partly swizzled IRQs on slot 16.
			 * We assume the same IRQ for all pins on the remaining slots, that
			 * is what the boardfile was doing.
			 */
			#interrupt-cells = <1>;
			interrupt-map-mask = <0xf800 0 0 7>;
			interrupt-map =
			/* IDSEL 14 used for "Wireless" in the board file */
			<0x7000 0 0 1 &gpio0 7  IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 14 is irq 7 */
			/* IDSEL 15 used for VIA VT6307 IEEE 1394 Firewire */
			<0x7800 0 0 1 &gpio0 8  IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 15 is irq 8 */
			/* IDSEL 16 used for VIA VT6202 USB 2.0 4+1 */
			<0x8000 0 0 1 &gpio0 11 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 16 is irq 11 */
			<0x8000 0 0 2 &gpio0 10 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 16 is irq 10 */
			<0x8000 0 0 3 &gpio0 9  IRQ_TYPE_LEVEL_LOW>; /* INT C on slot 16 is irq 9 */
		};

		gpio@c8004000 {
			/* Enable clock out on GPIO 15 */
			intel,ixp4xx-gpio15-clkout;
		};

		/* EthB WAN */
		ethernet@c8009000 {
			status = "okay";
			queue-rx = <&qmgr 3>;
			queue-txready = <&qmgr 20>;
			phy-mode = "rgmii";
			phy-handle = <&phy9>;

			mdio {
				#address-cells = <1>;
				#size-cells = <0>;

				/*
				 * PHY 0..4 are internal to the MV88E6060 switch but appear
				 * as independent devices.
				 */
				phy0: ethernet-phy@0 {
					reg = <0>;
				};
				phy1: ethernet-phy@1 {
					reg = <1>;
				};
				phy2: ethernet-phy@2 {
					reg = <2>;
				};
				phy3: ethernet-phy@3 {
					reg = <3>;
				};

				/* Altima AMI101L used by the WAN port */
				phy9: ethernet-phy@9 {
					reg = <9>;
				};

				/* The switch uses MDIO addresses 16 thru 31 */
				switch@16 {
					compatible = "marvell,mv88e6060";
					reg = <16>;

					ports {
						#address-cells = <1>;
						#size-cells = <0>;

						port@0 {
							reg = <0>;
							label = "lan1";
							phy-handle = <&phy0>;
						};

						port@1 {
							reg = <1>;
							label = "lan2";
							phy-handle = <&phy1>;
						};

						port@2 {
							reg = <2>;
							label = "lan3";
							phy-handle = <&phy2>;
						};

						port@3 {
							reg = <3>;
							label = "lan4";
							phy-handle = <&phy3>;
						};

						port@5 {
							/* Port 5 is the CPU port according to the MV88E6060 datasheet */
							reg = <5>;
							phy-mode = "rgmii-id";
							ethernet = <&ethc>;
							label = "cpu";
							fixed-link {
								speed = <100>;
								full-duplex;
							};
						};
					};
				};
			};
		};

		/* EthC LAN connected to the Marvell DSA Switch */
		ethc: ethernet@c800a000 {
			status = "okay";
			queue-rx = <&qmgr 4>;
			queue-txready = <&qmgr 21>;
			phy-mode = "rgmii";
			fixed-link {
				speed = <100>;
				full-duplex;
			};
		};
	};
};
