// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Copyright (c) 2014 Protonic Holland
 */

/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-prti6q.dtsi"
#include <dt-bindings/leds/common.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>

/ {
	model = "Protonic PRTI6Q board";
	compatible = "prt,prti6q", "fsl,imx6q";

	memory@10000000 {
		device_type = "memory";
		reg = <0x10000000 0xf0000000>;
	};

	backlight_lcd: backlight-lcd {
		compatible = "pwm-backlight";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_backlight>;
		pwms = <&pwm1 0 5000000 0>;
		brightness-levels = <0 16 64 255>;
		num-interpolated-steps = <16>;
		default-brightness-level = <1>;
		power-supply = <&reg_3v3>;
		enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
	};

	can_osc: can-osc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_leds>;

		led-debug0 {
			function = LED_FUNCTION_STATUS;
			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
		};

		led-debug1 {
			function = LED_FUNCTION_SD;
			gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "disk-activity";
		};
	};

	panel {
		compatible = "kyo,tcg121xglp";
		backlight = <&backlight_lcd>;

		port {
			panel_in: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	reg_1v8: regulator-1v8 {
		compatible = "regulator-fixed";
		regulator-name = "1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	reg_wifi: regulator-wifi {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wifi_npd>;
		enable-active-high;
		gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		regulator-max-microvolt = <1800000>;
		regulator-min-microvolt = <1800000>;
		regulator-name = "regulator-WL12xx";
		startup-delay-us = <70000>;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "prti6q-sgtl5000";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Line", "Line In Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "External Speaker";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"External Speaker", "LINE_OUT";

		simple-audio-card,cpu {
			sound-dai = <&ssi1>;
			system-clock-frequency = <0>;
		};

		simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			bitclock-master;
			frame-master;
		};
	};

	spdif_out: spdif-out {
		compatible = "linux,spdif-dit";
		#sound-dai-cells = <0>;
	};

	spdif_in: spdif-in {
		compatible = "linux,spdif-dir";
		#sound-dai-cells = <0>;
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		audio-cpu = <&spdif>;
		audio-codec = <&spdif_out>, <&spdif_in>;
	};
};

&audmux {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_audmux>;
	status = "okay";

	mux-ssi1 {
		fsl,audmux-port = <0>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN		0
			IMX_AUDMUX_V2_PTCR_TFSEL(2)	0
			IMX_AUDMUX_V2_PTCR_TCSEL(2)	0
			IMX_AUDMUX_V2_PTCR_TFSDIR	0
			IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
		>;
	};

	mux-pins3 {
		fsl,audmux-port = <2>;
		fsl,port-config = <
			IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
			0		       IMX_AUDMUX_V2_PDCR_TXRXEN
		>;
	};
};

&can1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can1>;
	status = "okay";
};

&can2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_can2>;
	status = "okay";
};

&ecspi1 {
	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>;
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <20000000>;
	};
};

&ecspi2 {
	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio4 25 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>;
	status = "okay";

	can@0 {
		compatible = "microchip,mcp2515";
		reg = <0>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_can3>;
		clocks = <&can_osc>;
		interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>;
		spi-max-frequency = <5000000>;
	};

	adc@1 {
		compatible = "ti,adc128s052";
		reg = <1>;
		spi-max-frequency = <2000000>;
		vref-supply = <&reg_3v3>;
	};
};

&ecspi3 {
	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
};

&fec {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_enet>;
	phy-mode = "rgmii-id";
	phy-handle = <&rgmii_phy>;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		/* Microchip KSZ9031RNX PHY */
		rgmii_phy: ethernet-phy@0 {
			reg = <0>;
			interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
			reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
			reset-assert-us = <10000>;
			reset-deassert-us = <300>;
		};
	};
};

&hdmi {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hdmi>;
	ddc-i2c-bus = <&i2c2>;
	status = "okay";
};

&i2c1 {
	sgtl5000: audio-codec@a {
		compatible = "fsl,sgtl5000";
		reg = <0xa>;
		#sound-dai-cells = <0>;
		clocks = <&clks 201>;
		VDDA-supply = <&reg_3v3>;
		VDDIO-supply = <&reg_3v3>;
		VDDD-supply = <&reg_1v8>;
	};
};

/* DDC */
&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c3 {
	adc@49 {
		compatible = "ti,ads1015";
		reg = <0x49>;
		#address-cells = <1>;
		#size-cells = <0>;

		/* can2_l */
		channel@4 {
			reg = <4>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};

		/* can2_h */
		channel@5 {
			reg = <5>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};

		/* can1_l */
		channel@6 {
			reg = <6>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};

		/* can1_h */
		channel@7 {
			reg = <7>;
			ti,gain = <3>;
			ti,datarate = <3>;
		};
	};
};

&pcie {
	status = "okay";
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&ldb {
	status = "okay";

	lvds-channel@0 {
		status = "okay";

		port@4 {
			reg = <4>;

			lvds0_out: endpoint {
				remote-endpoint = <&panel_in>;
			};
		};
	};
};

&sata {
	status = "okay";
};

&snvs_poweroff {
	status = "okay";
};

&spdif {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif>;
	status = "okay";
};

&ssi1 {
	#sound-dai-cells = <0>;
	fsl,mode = "ac97-slave";
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart5>;
	status = "okay";
};

&usbotg {
	pinctrl-0 = <&pinctrl_usbotg &pinctrl_usbotg_id>;
};

&usdhc2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	non-removable;
	vmmc-supply = <&reg_wifi>;
	cap-power-off-card;
	keep-power-in-suspend;
	status = "okay";

	#address-cells = <1>;
	#size-cells = <0>;
	wifi@2 {
		compatible = "ti,wl1271";
		reg = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wifi>;
		interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>;
		ref-clock-frequency = <38400000>;
		tcxo-clock-frequency = <19200000>;
	};
};

&iomuxc {
	pinctrl_audmux: audmuxgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1		0x030b0
			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC		0x130b0
			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD		0x110b0
			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS		0x130b0
		>;
	};

	pinctrl_backlight: backlightgrp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28	0x1b0b0
		>;
	};

	pinctrl_can2: can2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX	0x1b008
			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX	0x1b008
		>;
	};

	pinctrl_can3: can3grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D20__GPIO3_IO20		0x1b0b1
		>;
	};

	pinctrl_ecspi1: ecspi1grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D17__ECSPI1_MISO		0x100b1
			MX6QDL_PAD_EIM_D18__ECSPI1_MOSI		0x100b1
			MX6QDL_PAD_EIM_D16__ECSPI1_SCLK		0x100b1
			/* CS */
			MX6QDL_PAD_EIM_D19__GPIO3_IO19		0x000b1
		>;
	};

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_OE__ECSPI2_MISO		0x100b1
			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK		0x100b1
			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI		0x100b1
			MX6QDL_PAD_EIM_RW__GPIO2_IO26		0x000b1
		>;
	};

	pinctrl_ecspi2_cs: ecspi2csgrp {
		fsl,pins = <
			/* ADC128S022 CS */
			MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25	0x1b0b1
		>;
	};

	pinctrl_ecspi3: ecspi3grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK	0x100b1
			MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI	0x100b1
			MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO	0x100b1
			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24	0x000b1
		>;
	};

	pinctrl_enet: enetgrp {
		fsl,pins = <
			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b030
			MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b030
			MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b030
			MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b030
			MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b030
			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b030
			MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x10030
			MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x10030
			MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x10030
			MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x10030
			MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x10030
			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x10030
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x10030
			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x10030
			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x10030

			/* Phy reset */
			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	0x1b0b0
			MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	0x1b0b1
		>;
	};

	pinctrl_hdmi: hdmigrp {
		fsl,pins = <
			/* NOTE: DDC is done via I2C2, so DON'T
			 * configure DDC pins for HDMI!
			 */
			MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE	0x1f8b0
		>;
	};

	/* DDC */
	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL3__I2C2_SCL	0x4001b8b1
			MX6QDL_PAD_KEY_ROW3__I2C2_SDA	0x4001b8b1
		>;
	};

	pinctrl_leds: ledsgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x1b0b0
			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x1b0b0
		>;
	};

	pinctrl_pwm1: pwm1grp {
		fsl,pins = <
			MX6QDL_PAD_DISP0_DAT8__PWM1_OUT		0x1b0b0
		>;
	};

	pinctrl_spdif: spdifgrp {
		fsl,pins = <
			MX6QDL_PAD_GPIO_16__SPDIF_IN		0x1b0b0
			MX6QDL_PAD_GPIO_19__SPDIF_OUT		0x1b0b0
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX6QDL_PAD_EIM_D26__UART2_RX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D27__UART2_TX_DATA	0x1b0b1
			MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	0x1b0b1
			MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	0x1b0b1
		>;
	};

	pinctrl_uart5: uart5grp {
		fsl,pins = <
			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA	0x1b0b1
			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
		>;
	};

	pinctrl_usbotg_id: usbotgidgrp {
		fsl,pins = <
			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID	0x1f058
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x170b9
			MX6QDL_PAD_SD2_CLK__SD2_CLK		0x100b9
			MX6QDL_PAD_SD2_DAT0__SD2_DATA0		0x170b9
			MX6QDL_PAD_SD2_DAT1__SD2_DATA1		0x170b9
			MX6QDL_PAD_SD2_DAT2__SD2_DATA2		0x170b9
			MX6QDL_PAD_SD2_DAT3__SD2_DATA3		0x170b9
		>;
	};

	pinctrl_wifi: wifigrp {
		fsl,pins = <
			/* WL12xx IRQ */
			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x10880
		>;
	};

	pinctrl_wifi_npd: wifinpd {
		fsl,pins = <
			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x1b8b0
		>;
	};
};
