// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * Device Tree file for Armada 385 Allied Telesis x530/GS980MX Board.
 (x530/AT-GS980MX)
 *
 Copyright (C) 2020 Allied Telesis Labs
 */

/dts-v1/;
#include "armada-385.dtsi"

#include <dt-bindings/gpio/gpio.h>

/ {
	model = "x530/AT-GS980MX";
	compatible = "alliedtelesis,gs980mx", "alliedtelesis,x530", "marvell,armada385", "marvell,armada380";

	chosen {
		stdout-path = "serial1:115200n8";
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x40000000>; /* 1GB */
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x3d) 0 0xf4800000 0x80000
			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;

		internal-regs {
			i2c0: i2c@11000 {
				pinctrl-names = "default";
				pinctrl-0 = <&i2c0_pins>;
				status = "okay";
			};

			uart0: serial@12000 {
				pinctrl-names = "default";
				pinctrl-0 = <&uart0_pins>;
				status = "okay";
			};
		};
	};

	led-7seg {
		compatible = "gpio-7-segment";
		segment-gpios = <&led_7seg_gpio 0 GPIO_ACTIVE_LOW>,
				<&led_7seg_gpio 1 GPIO_ACTIVE_LOW>,
				<&led_7seg_gpio 2 GPIO_ACTIVE_LOW>,
				<&led_7seg_gpio 3 GPIO_ACTIVE_LOW>,
				<&led_7seg_gpio 4 GPIO_ACTIVE_LOW>,
				<&led_7seg_gpio 5 GPIO_ACTIVE_LOW>,
				<&led_7seg_gpio 6 GPIO_ACTIVE_LOW>;
	};
};

&pciec {
	status = "okay";
};

&pcie1 {
	status = "okay";
	reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
	reset-delay-us = <400000>;
};

&pcie2 {
	status = "okay";
};

&devbus_cs1 {
	compatible = "marvell,mvebu-devbus";
	status = "okay";

	devbus,bus-width    = <8>;
	devbus,turn-off-ps  = <60000>;
	devbus,badr-skew-ps = <0>;
	devbus,acc-first-ps = <124000>;
	devbus,acc-next-ps  = <248000>;
	devbus,rd-setup-ps  = <0>;
	devbus,rd-hold-ps   = <0>;

	/* Write parameters */
	devbus,sync-enable = <0>;
	devbus,wr-high-ps  = <60000>;
	devbus,wr-low-ps   = <60000>;
	devbus,ale-wr-ps   = <60000>;

	nvs@0 {
		status = "okay";

		compatible = "mtd-ram";
		reg = <0 0x00080000>;
		bank-width = <1>;
		label = "nvs";
	};
};

&pinctrl {
	i2c0_gpio_pins: i2c-gpio-pins-0 {
		marvell,pins = "mpp2", "mpp3";
		marvell,function = "gpio";
	};
};

&i2c0 {
	clock-frequency = <100000>;
	status = "okay";

	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-1 = <&i2c0_gpio_pins>;
	scl-gpio = <&gpio0 2 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
	sda-gpio = <&gpio0 3 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;

	i2c0mux: mux@71 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nxp,pca9544";
		reg = <0x71>;
		i2c-mux-idle-disconnect;

		i2c@0 { /* POE devices MUX */
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;
		};

		i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;

			adt7476_2e: hwmon@2e {
				compatible = "adi,adt7476";
				reg = <0x2e>;
			};

			adt7476_2d: hwmon@2d {
				compatible = "adi,adt7476";
				reg = <0x2d>;
			};
		};

		i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;

			rtc@68 {
				compatible = "dallas,ds1340";
				reg = <0x68>;
			};
		};

		i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;

			led_7seg_gpio: gpio@20 {
				compatible = "nxp,pca9554";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x20>;
			};
		};
	};
};

&usb0 {
	status = "okay";
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins>;
	status = "okay";

	flash@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <1>; /* Chip select 1 */
		spi-max-frequency = <54000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				reg = <0x00000000 0x00100000>;
				label = "u-boot";
			};
			partition@100000 {
				reg = <0x00100000 0x00040000>;
				label = "u-boot-env";
			};
			partition@140000 {
				reg = <0x00140000 0x00e80000>;
				label = "unused";
			};
			partition@fc0000 {
				reg = <0x00fc0000 0x00040000>;
				label = "idprom";
			};
		};
	};
};

&nand_controller {
	status = "okay";

	nand@0 {
		reg = <0>;
		label = "pxa3xx_nand-0";
		nand-rb = <0>;
		nand-on-flash-bbt;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;

		marvell,nand-enable-arbiter;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				reg = <0x00000000 0x0f000000>;
				label = "user";
			};
			partition@f000000 {
				/* Maximum mtdoops size is 8MB, so set to that. */
				reg = <0x0f000000 0x00800000>;
				label = "errlog";
			};
			partition@f800000 {
				reg = <0x0f800000 0x00800000>;
				label = "nand-bbt";
			};
		};
	};
};

