/* This file is part of the libopencm3 project. * * It was generated by the irq2nvic_h script. * * These definitions bend every interrupt handler that is defined CMSIS style * to the weak symbol exported by libopencm3. */ #define WWDG_IRQHandler wwdg_isr #define PVD_IRQHandler pvd_isr #define TAMPER_IRQHandler tamper_isr #define RTC_IRQHandler rtc_isr #define FLASH_IRQHandler flash_isr #define RCC_IRQHandler rcc_isr #define EXTI0_IRQHandler exti0_isr #define EXTI1_IRQHandler exti1_isr #define EXTI2_IRQHandler exti2_isr #define EXTI3_IRQHandler exti3_isr #define EXTI4_IRQHandler exti4_isr #define DMA1_CHANNEL1_IRQHandler dma1_channel1_isr #define DMA1_CHANNEL2_IRQHandler dma1_channel2_isr #define DMA1_CHANNEL3_IRQHandler dma1_channel3_isr #define DMA1_CHANNEL4_IRQHandler dma1_channel4_isr #define DMA1_CHANNEL5_IRQHandler dma1_channel5_isr #define DMA1_CHANNEL6_IRQHandler dma1_channel6_isr #define DMA1_CHANNEL7_IRQHandler dma1_channel7_isr #define ADC1_2_IRQHandler adc1_2_isr #define USB_HP_CAN_TX_IRQHandler usb_hp_can_tx_isr #define USB_LP_CAN_RX0_IRQHandler usb_lp_can_rx0_isr #define CAN_RX1_IRQHandler can_rx1_isr #define CAN_SCE_IRQHandler can_sce_isr #define EXTI9_5_IRQHandler exti9_5_isr #define TIM1_BRK_IRQHandler tim1_brk_isr #define TIM1_UP_IRQHandler tim1_up_isr #define TIM1_TRG_COM_IRQHandler tim1_trg_com_isr #define TIM1_CC_IRQHandler tim1_cc_isr #define TIM2_IRQHandler tim2_isr #define TIM3_IRQHandler tim3_isr #define TIM4_IRQHandler tim4_isr #define I2C1_EV_IRQHandler i2c1_ev_isr #define I2C1_ER_IRQHandler i2c1_er_isr #define I2C2_EV_IRQHandler i2c2_ev_isr #define I2C2_ER_IRQHandler i2c2_er_isr #define SPI1_IRQHandler spi1_isr #define SPI2_IRQHandler spi2_isr #define USART1_IRQHandler usart1_isr #define USART2_IRQHandler usart2_isr #define USART3_IRQHandler usart3_isr #define EXTI15_10_IRQHandler exti15_10_isr #define RTC_ALARM_IRQHandler rtc_alarm_isr #define USB_WAKEUP_IRQHandler usb_wakeup_isr #define TIM8_BRK_IRQHandler tim8_brk_isr #define TIM8_UP_IRQHandler tim8_up_isr #define TIM8_TRG_COM_IRQHandler tim8_trg_com_isr #define TIM8_CC_IRQHandler tim8_cc_isr #define ADC3_IRQHandler adc3_isr #define FSMC_IRQHandler fsmc_isr #define SDIO_IRQHandler sdio_isr #define TIM5_IRQHandler tim5_isr #define SPI3_IRQHandler spi3_isr #define UART4_IRQHandler uart4_isr #define UART5_IRQHandler uart5_isr #define TIM6_IRQHandler tim6_isr #define TIM7_IRQHandler tim7_isr #define DMA2_CHANNEL1_IRQHandler dma2_channel1_isr #define DMA2_CHANNEL2_IRQHandler dma2_channel2_isr #define DMA2_CHANNEL3_IRQHandler dma2_channel3_isr #define DMA2_CHANNEL4_5_IRQHandler dma2_channel4_5_isr #define DMA2_CHANNEL5_IRQHandler dma2_channel5_isr #define ETH_IRQHandler eth_isr #define ETH_WKUP_IRQHandler eth_wkup_isr #define CAN2_TX_IRQHandler can2_tx_isr #define CAN2_RX0_IRQHandler can2_rx0_isr #define CAN2_RX1_IRQHandler can2_rx1_isr #define CAN2_SCE_IRQHandler can2_sce_isr #define OTG_FS_IRQHandler otg_fs_isr