1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 4.2.0 #13081 (Linux) 4 ;-------------------------------------------------------- 5 .module spi 6 .optsdcc -mmcs51 --model-small 7 8 ;-------------------------------------------------------- 9 ; Public variables in this module 10 ;-------------------------------------------------------- 11 .globl _bitALTERA_DCLK 12 .globl _bitALTERA_DATA0 13 .globl _bitS_IN 14 .globl _bitS_OUT 15 .globl _bitS_CLK 16 .globl _EIPX6 17 .globl _EIPX5 18 .globl _EIPX4 19 .globl _PI2C 20 .globl _PUSB 21 .globl _EIEX6 22 .globl _EIEX5 23 .globl _EIEX4 24 .globl _EI2C 25 .globl _EIUSB 26 .globl _SMOD1 27 .globl _ERESI 28 .globl _RESI 29 .globl _INT6 30 .globl _CY 31 .globl _AC 32 .globl _F0 33 .globl _RS1 34 .globl _RS0 35 .globl _OV 36 .globl _FL 37 .globl _P 38 .globl _TF2 39 .globl _EXF2 40 .globl _RCLK 41 .globl _TCLK 42 .globl _EXEN2 43 .globl _TR2 44 .globl _C_T2 45 .globl _CP_RL2 46 .globl _SM01 47 .globl _SM11 48 .globl _SM21 49 .globl _REN1 50 .globl _TB81 51 .globl _RB81 52 .globl _TI1 53 .globl _RI1 54 .globl _PS1 55 .globl _PT2 56 .globl _PS0 57 .globl _PT1 58 .globl _PX1 59 .globl _PT0 60 .globl _PX0 61 .globl _EA 62 .globl _ES1 63 .globl _ET2 64 .globl _ES0 65 .globl _ET1 66 .globl _EX1 67 .globl _ET0 68 .globl _EX0 69 .globl _SM0 70 .globl _SM1 71 .globl _SM2 72 .globl _REN 73 .globl _TB8 74 .globl _RB8 75 .globl _TI 76 .globl _RI 77 .globl _TF1 78 .globl _TR1 79 .globl _TF0 80 .globl _TR0 81 .globl _IE1 82 .globl _IT1 83 .globl _IE0 84 .globl _IT0 85 .globl _SEL 86 .globl _EIP 87 .globl _B 88 .globl _EIE 89 .globl _ACC 90 .globl _EICON 91 .globl _PSW 92 .globl _TH2 93 .globl _TL2 94 .globl _RCAP2H 95 .globl _RCAP2L 96 .globl _T2CON 97 .globl _SBUF1 98 .globl _SCON1 99 .globl _GPIFSGLDATLNOX 100 .globl _GPIFSGLDATLX 101 .globl _GPIFSGLDATH 102 .globl _GPIFTRIG 103 .globl _EP01STAT 104 .globl _IP 105 .globl _OEE 106 .globl _OED 107 .globl _OEC 108 .globl _OEB 109 .globl _OEA 110 .globl _IOE 111 .globl _IOD 112 .globl _AUTOPTRSETUP 113 .globl _EP68FIFOFLGS 114 .globl _EP24FIFOFLGS 115 .globl _EP2468STAT 116 .globl _IE 117 .globl _INT4CLR 118 .globl _INT2CLR 119 .globl _IOC 120 .globl _AUTODAT2 121 .globl _AUTOPTRL2 122 .globl _AUTOPTRH2 123 .globl _AUTODAT1 124 .globl _APTR1L 125 .globl _APTR1H 126 .globl _SBUF0 127 .globl _SCON0 128 .globl _MPAGE 129 .globl _EXIF 130 .globl _IOB 131 .globl _CKCON 132 .globl _TH1 133 .globl _TH0 134 .globl _TL1 135 .globl _TL0 136 .globl _TMOD 137 .globl _TCON 138 .globl _PCON 139 .globl _DPS 140 .globl _DPH1 141 .globl _DPL1 142 .globl _DPH 143 .globl _DPL 144 .globl _SP 145 .globl _IOA 146 .globl _EP8FIFOBUF 147 .globl _EP6FIFOBUF 148 .globl _EP4FIFOBUF 149 .globl _EP2FIFOBUF 150 .globl _EP1INBUF 151 .globl _EP1OUTBUF 152 .globl _EP0BUF 153 .globl _CT4 154 .globl _CT3 155 .globl _CT2 156 .globl _CT1 157 .globl _USBTEST 158 .globl _TESTCFG 159 .globl _DBUG 160 .globl _UDMACRCQUAL 161 .globl _UDMACRCL 162 .globl _UDMACRCH 163 .globl _GPIFHOLDAMOUNT 164 .globl _FLOWSTBHPERIOD 165 .globl _FLOWSTBEDGE 166 .globl _FLOWSTB 167 .globl _FLOWHOLDOFF 168 .globl _FLOWEQ1CTL 169 .globl _FLOWEQ0CTL 170 .globl _FLOWLOGIC 171 .globl _FLOWSTATE 172 .globl _GPIFABORT 173 .globl _GPIFREADYSTAT 174 .globl _GPIFREADYCFG 175 .globl _XGPIFSGLDATLNOX 176 .globl _XGPIFSGLDATLX 177 .globl _XGPIFSGLDATH 178 .globl _EP8GPIFTRIG 179 .globl _EP8GPIFPFSTOP 180 .globl _EP8GPIFFLGSEL 181 .globl _EP6GPIFTRIG 182 .globl _EP6GPIFPFSTOP 183 .globl _EP6GPIFFLGSEL 184 .globl _EP4GPIFTRIG 185 .globl _EP4GPIFPFSTOP 186 .globl _EP4GPIFFLGSEL 187 .globl _EP2GPIFTRIG 188 .globl _EP2GPIFPFSTOP 189 .globl _EP2GPIFFLGSEL 190 .globl _GPIFTCB0 191 .globl _GPIFTCB1 192 .globl _GPIFTCB2 193 .globl _GPIFTCB3 194 .globl _GPIFADRL 195 .globl _GPIFADRH 196 .globl _GPIFCTLCFG 197 .globl _GPIFIDLECTL 198 .globl _GPIFIDLECS 199 .globl _GPIFWFSELECT 200 .globl _SETUPDAT 201 .globl _SUDPTRCTL 202 .globl _SUDPTRL 203 .globl _SUDPTRH 204 .globl _EP8FIFOBCL 205 .globl _EP8FIFOBCH 206 .globl _EP6FIFOBCL 207 .globl _EP6FIFOBCH 208 .globl _EP4FIFOBCL 209 .globl _EP4FIFOBCH 210 .globl _EP2FIFOBCL 211 .globl _EP2FIFOBCH 212 .globl _EP8FIFOFLGS 213 .globl _EP6FIFOFLGS 214 .globl _EP4FIFOFLGS 215 .globl _EP2FIFOFLGS 216 .globl _EP8CS 217 .globl _EP6CS 218 .globl _EP4CS 219 .globl _EP2CS 220 .globl _EP1INCS 221 .globl _EP1OUTCS 222 .globl _EP0CS 223 .globl _EP8BCL 224 .globl _EP8BCH 225 .globl _EP6BCL 226 .globl _EP6BCH 227 .globl _EP4BCL 228 .globl _EP4BCH 229 .globl _EP2BCL 230 .globl _EP2BCH 231 .globl _EP1INBC 232 .globl _EP1OUTBC 233 .globl _EP0BCL 234 .globl _EP0BCH 235 .globl _FNADDR 236 .globl _MICROFRAME 237 .globl _USBFRAMEL 238 .globl _USBFRAMEH 239 .globl _TOGCTL 240 .globl _WAKEUPCS 241 .globl _SUSPEND 242 .globl _USBCS 243 .globl _XAUTODAT2 244 .globl _XAUTODAT1 245 .globl _I2CTL 246 .globl _I2DAT 247 .globl _I2CS 248 .globl _PORTECFG 249 .globl _PORTCCFG 250 .globl _PORTACFG 251 .globl _INTSETUP 252 .globl _INT4IVEC 253 .globl _INT2IVEC 254 .globl _CLRERRCNT 255 .globl _ERRCNTLIM 256 .globl _USBERRIRQ 257 .globl _USBERRIE 258 .globl _GPIFIRQ 259 .globl _GPIFIE 260 .globl _EPIRQ 261 .globl _EPIE 262 .globl _USBIRQ 263 .globl _USBIE 264 .globl _NAKIRQ 265 .globl _NAKIE 266 .globl _IBNIRQ 267 .globl _IBNIE 268 .globl _EP8FIFOIRQ 269 .globl _EP8FIFOIE 270 .globl _EP6FIFOIRQ 271 .globl _EP6FIFOIE 272 .globl _EP4FIFOIRQ 273 .globl _EP4FIFOIE 274 .globl _EP2FIFOIRQ 275 .globl _EP2FIFOIE 276 .globl _OUTPKTEND 277 .globl _INPKTEND 278 .globl _EP8ISOINPKTS 279 .globl _EP6ISOINPKTS 280 .globl _EP4ISOINPKTS 281 .globl _EP2ISOINPKTS 282 .globl _EP8FIFOPFL 283 .globl _EP8FIFOPFH 284 .globl _EP6FIFOPFL 285 .globl _EP6FIFOPFH 286 .globl _EP4FIFOPFL 287 .globl _EP4FIFOPFH 288 .globl _EP2FIFOPFL 289 .globl _EP2FIFOPFH 290 .globl _EP8AUTOINLENL 291 .globl _EP8AUTOINLENH 292 .globl _EP6AUTOINLENL 293 .globl _EP6AUTOINLENH 294 .globl _EP4AUTOINLENL 295 .globl _EP4AUTOINLENH 296 .globl _EP2AUTOINLENL 297 .globl _EP2AUTOINLENH 298 .globl _EP8FIFOCFG 299 .globl _EP6FIFOCFG 300 .globl _EP4FIFOCFG 301 .globl _EP2FIFOCFG 302 .globl _EP8CFG 303 .globl _EP6CFG 304 .globl _EP4CFG 305 .globl _EP2CFG 306 .globl _EP1INCFG 307 .globl _EP1OUTCFG 308 .globl _REVCTL 309 .globl _REVID 310 .globl _FIFOPINPOLAR 311 .globl _UART230 312 .globl _BPADDRL 313 .globl _BPADDRH 314 .globl _BREAKPT 315 .globl _FIFORESET 316 .globl _PINFLAGSCD 317 .globl _PINFLAGSAB 318 .globl _IFCONFIG 319 .globl _CPUCS 320 .globl _RES_WAVEDATA_END 321 .globl _GPIF_WAVE_DATA 322 .globl _spi_write_PARM_6 323 .globl _spi_write_PARM_5 324 .globl _spi_write_PARM_4 325 .globl _spi_write_PARM_3 326 .globl _spi_write_PARM_2 327 .globl _spi_read_PARM_6 328 .globl _spi_read_PARM_5 329 .globl _spi_read_PARM_4 330 .globl _spi_read_PARM_3 331 .globl _spi_read_PARM_2 332 .globl _init_spi 333 .globl _spi_read 334 .globl _spi_write 335 ;-------------------------------------------------------- 336 ; special function registers 337 ;-------------------------------------------------------- 338 .area RSEG (ABS,DATA) 000000 339 .org 0x0000 000080 340 _IOA = 0x0080 000081 341 _SP = 0x0081 000082 342 _DPL = 0x0082 000083 343 _DPH = 0x0083 000084 344 _DPL1 = 0x0084 000085 345 _DPH1 = 0x0085 000086 346 _DPS = 0x0086 000087 347 _PCON = 0x0087 000088 348 _TCON = 0x0088 000089 349 _TMOD = 0x0089 00008A 350 _TL0 = 0x008a 00008B 351 _TL1 = 0x008b 00008C 352 _TH0 = 0x008c 00008D 353 _TH1 = 0x008d 00008E 354 _CKCON = 0x008e 000090 355 _IOB = 0x0090 000091 356 _EXIF = 0x0091 000092 357 _MPAGE = 0x0092 000098 358 _SCON0 = 0x0098 000099 359 _SBUF0 = 0x0099 00009A 360 _APTR1H = 0x009a 00009B 361 _APTR1L = 0x009b 00009C 362 _AUTODAT1 = 0x009c 00009D 363 _AUTOPTRH2 = 0x009d 00009E 364 _AUTOPTRL2 = 0x009e 00009F 365 _AUTODAT2 = 0x009f 0000A0 366 _IOC = 0x00a0 0000A1 367 _INT2CLR = 0x00a1 0000A2 368 _INT4CLR = 0x00a2 0000A8 369 _IE = 0x00a8 0000AA 370 _EP2468STAT = 0x00aa 0000AB 371 _EP24FIFOFLGS = 0x00ab 0000AC 372 _EP68FIFOFLGS = 0x00ac 0000AF 373 _AUTOPTRSETUP = 0x00af 0000B0 374 _IOD = 0x00b0 0000B1 375 _IOE = 0x00b1 0000B2 376 _OEA = 0x00b2 0000B3 377 _OEB = 0x00b3 0000B4 378 _OEC = 0x00b4 0000B5 379 _OED = 0x00b5 0000B6 380 _OEE = 0x00b6 0000B8 381 _IP = 0x00b8 0000BA 382 _EP01STAT = 0x00ba 0000BB 383 _GPIFTRIG = 0x00bb 0000BD 384 _GPIFSGLDATH = 0x00bd 0000BE 385 _GPIFSGLDATLX = 0x00be 0000BF 386 _GPIFSGLDATLNOX = 0x00bf 0000C0 387 _SCON1 = 0x00c0 0000C1 388 _SBUF1 = 0x00c1 0000C8 389 _T2CON = 0x00c8 0000CA 390 _RCAP2L = 0x00ca 0000CB 391 _RCAP2H = 0x00cb 0000CC 392 _TL2 = 0x00cc 0000CD 393 _TH2 = 0x00cd 0000D0 394 _PSW = 0x00d0 0000D8 395 _EICON = 0x00d8 0000E0 396 _ACC = 0x00e0 0000E8 397 _EIE = 0x00e8 0000F0 398 _B = 0x00f0 0000F8 399 _EIP = 0x00f8 400 ;-------------------------------------------------------- 401 ; special function bits 402 ;-------------------------------------------------------- 403 .area RSEG (ABS,DATA) 000000 404 .org 0x0000 000086 405 _SEL = 0x0086 000088 406 _IT0 = 0x0088 000089 407 _IE0 = 0x0089 00008A 408 _IT1 = 0x008a 00008B 409 _IE1 = 0x008b 00008C 410 _TR0 = 0x008c 00008D 411 _TF0 = 0x008d 00008E 412 _TR1 = 0x008e 00008F 413 _TF1 = 0x008f 000098 414 _RI = 0x0098 000099 415 _TI = 0x0099 00009A 416 _RB8 = 0x009a 00009B 417 _TB8 = 0x009b 00009C 418 _REN = 0x009c 00009D 419 _SM2 = 0x009d 00009E 420 _SM1 = 0x009e 00009F 421 _SM0 = 0x009f 0000A8 422 _EX0 = 0x00a8 0000A9 423 _ET0 = 0x00a9 0000AA 424 _EX1 = 0x00aa 0000AB 425 _ET1 = 0x00ab 0000AC 426 _ES0 = 0x00ac 0000AD 427 _ET2 = 0x00ad 0000AE 428 _ES1 = 0x00ae 0000AF 429 _EA = 0x00af 0000B8 430 _PX0 = 0x00b8 0000B9 431 _PT0 = 0x00b9 0000BA 432 _PX1 = 0x00ba 0000BB 433 _PT1 = 0x00bb 0000BC 434 _PS0 = 0x00bc 0000BD 435 _PT2 = 0x00bd 0000BE 436 _PS1 = 0x00be 0000C0 437 _RI1 = 0x00c0 0000C1 438 _TI1 = 0x00c1 0000C2 439 _RB81 = 0x00c2 0000C3 440 _TB81 = 0x00c3 0000C4 441 _REN1 = 0x00c4 0000C5 442 _SM21 = 0x00c5 0000C6 443 _SM11 = 0x00c6 0000C7 444 _SM01 = 0x00c7 0000C8 445 _CP_RL2 = 0x00c8 0000C9 446 _C_T2 = 0x00c9 0000CA 447 _TR2 = 0x00ca 0000CB 448 _EXEN2 = 0x00cb 0000CC 449 _TCLK = 0x00cc 0000CD 450 _RCLK = 0x00cd 0000CE 451 _EXF2 = 0x00ce 0000CF 452 _TF2 = 0x00cf 0000D0 453 _P = 0x00d0 0000D1 454 _FL = 0x00d1 0000D2 455 _OV = 0x00d2 0000D3 456 _RS0 = 0x00d3 0000D4 457 _RS1 = 0x00d4 0000D5 458 _F0 = 0x00d5 0000D6 459 _AC = 0x00d6 0000D7 460 _CY = 0x00d7 0000DB 461 _INT6 = 0x00db 0000DC 462 _RESI = 0x00dc 0000DD 463 _ERESI = 0x00dd 0000DF 464 _SMOD1 = 0x00df 0000E8 465 _EIUSB = 0x00e8 0000E9 466 _EI2C = 0x00e9 0000EA 467 _EIEX4 = 0x00ea 0000EB 468 _EIEX5 = 0x00eb 0000EC 469 _EIEX6 = 0x00ec 0000F8 470 _PUSB = 0x00f8 0000F9 471 _PI2C = 0x00f9 0000FA 472 _EIPX4 = 0x00fa 0000FB 473 _EIPX5 = 0x00fb 0000FC 474 _EIPX6 = 0x00fc 000080 475 _bitS_CLK = 0x0080 000081 476 _bitS_OUT = 0x0081 000082 477 _bitS_IN = 0x0082 0000A1 478 _bitALTERA_DATA0 = 0x00a1 0000A3 479 _bitALTERA_DCLK = 0x00a3 480 ;-------------------------------------------------------- 481 ; overlayable register banks 482 ;-------------------------------------------------------- 483 .area REG_BANK_0 (REL,OVR,DATA) 000000 484 .ds 8 485 ;-------------------------------------------------------- 486 ; internal ram data 487 ;-------------------------------------------------------- 488 .area DSEG (DATA) 000000 489 _spi_read_PARM_2: 000000 490 .ds 1 000001 491 _spi_read_PARM_3: 000001 492 .ds 1 000002 493 _spi_read_PARM_4: 000002 494 .ds 1 000003 495 _spi_read_PARM_5: 000003 496 .ds 2 000005 497 _spi_read_PARM_6: 000005 498 .ds 1 000006 499 _spi_write_PARM_2: 000006 500 .ds 1 000007 501 _spi_write_PARM_3: 000007 502 .ds 1 000008 503 _spi_write_PARM_4: 000008 504 .ds 1 000009 505 _spi_write_PARM_5: 000009 506 .ds 2 00000B 507 _spi_write_PARM_6: 00000B 508 .ds 1 00000C 509 _write_bytes_msb_PARM_2: 00000C 510 .ds 1 00000D 511 _read_bytes_msb_PARM_2: 00000D 512 .ds 1 513 ;-------------------------------------------------------- 514 ; overlayable items in internal ram 515 ;-------------------------------------------------------- 516 .area OSEG (OVR,DATA) 517 .area OSEG (OVR,DATA) 518 .area OSEG (OVR,DATA) 519 ;-------------------------------------------------------- 520 ; indirectly addressable internal ram data 521 ;-------------------------------------------------------- 522 .area ISEG (DATA) 523 ;-------------------------------------------------------- 524 ; absolute internal ram data 525 ;-------------------------------------------------------- 526 .area IABS (ABS,DATA) 527 .area IABS (ABS,DATA) 528 ;-------------------------------------------------------- 529 ; bit data 530 ;-------------------------------------------------------- 531 .area BSEG (BIT) 532 ;-------------------------------------------------------- 533 ; paged external ram data 534 ;-------------------------------------------------------- 535 .area PSEG (PAG,XDATA) 536 ;-------------------------------------------------------- 537 ; external ram data 538 ;-------------------------------------------------------- 539 .area XSEG (XDATA) 00E400 540 _GPIF_WAVE_DATA = 0xe400 00E480 541 _RES_WAVEDATA_END = 0xe480 00E600 542 _CPUCS = 0xe600 00E601 543 _IFCONFIG = 0xe601 00E602 544 _PINFLAGSAB = 0xe602 00E603 545 _PINFLAGSCD = 0xe603 00E604 546 _FIFORESET = 0xe604 00E605 547 _BREAKPT = 0xe605 00E606 548 _BPADDRH = 0xe606 00E607 549 _BPADDRL = 0xe607 00E608 550 _UART230 = 0xe608 00E609 551 _FIFOPINPOLAR = 0xe609 00E60A 552 _REVID = 0xe60a 00E60B 553 _REVCTL = 0xe60b 00E610 554 _EP1OUTCFG = 0xe610 00E611 555 _EP1INCFG = 0xe611 00E612 556 _EP2CFG = 0xe612 00E613 557 _EP4CFG = 0xe613 00E614 558 _EP6CFG = 0xe614 00E615 559 _EP8CFG = 0xe615 00E618 560 _EP2FIFOCFG = 0xe618 00E619 561 _EP4FIFOCFG = 0xe619 00E61A 562 _EP6FIFOCFG = 0xe61a 00E61B 563 _EP8FIFOCFG = 0xe61b 00E620 564 _EP2AUTOINLENH = 0xe620 00E621 565 _EP2AUTOINLENL = 0xe621 00E622 566 _EP4AUTOINLENH = 0xe622 00E623 567 _EP4AUTOINLENL = 0xe623 00E624 568 _EP6AUTOINLENH = 0xe624 00E625 569 _EP6AUTOINLENL = 0xe625 00E626 570 _EP8AUTOINLENH = 0xe626 00E627 571 _EP8AUTOINLENL = 0xe627 00E630 572 _EP2FIFOPFH = 0xe630 00E631 573 _EP2FIFOPFL = 0xe631 00E632 574 _EP4FIFOPFH = 0xe632 00E633 575 _EP4FIFOPFL = 0xe633 00E634 576 _EP6FIFOPFH = 0xe634 00E635 577 _EP6FIFOPFL = 0xe635 00E636 578 _EP8FIFOPFH = 0xe636 00E637 579 _EP8FIFOPFL = 0xe637 00E640 580 _EP2ISOINPKTS = 0xe640 00E641 581 _EP4ISOINPKTS = 0xe641 00E642 582 _EP6ISOINPKTS = 0xe642 00E643 583 _EP8ISOINPKTS = 0xe643 00E648 584 _INPKTEND = 0xe648 00E649 585 _OUTPKTEND = 0xe649 00E650 586 _EP2FIFOIE = 0xe650 00E651 587 _EP2FIFOIRQ = 0xe651 00E652 588 _EP4FIFOIE = 0xe652 00E653 589 _EP4FIFOIRQ = 0xe653 00E654 590 _EP6FIFOIE = 0xe654 00E655 591 _EP6FIFOIRQ = 0xe655 00E656 592 _EP8FIFOIE = 0xe656 00E657 593 _EP8FIFOIRQ = 0xe657 00E658 594 _IBNIE = 0xe658 00E659 595 _IBNIRQ = 0xe659 00E65A 596 _NAKIE = 0xe65a 00E65B 597 _NAKIRQ = 0xe65b 00E65C 598 _USBIE = 0xe65c 00E65D 599 _USBIRQ = 0xe65d 00E65E 600 _EPIE = 0xe65e 00E65F 601 _EPIRQ = 0xe65f 00E660 602 _GPIFIE = 0xe660 00E661 603 _GPIFIRQ = 0xe661 00E662 604 _USBERRIE = 0xe662 00E663 605 _USBERRIRQ = 0xe663 00E664 606 _ERRCNTLIM = 0xe664 00E665 607 _CLRERRCNT = 0xe665 00E666 608 _INT2IVEC = 0xe666 00E667 609 _INT4IVEC = 0xe667 00E668 610 _INTSETUP = 0xe668 00E670 611 _PORTACFG = 0xe670 00E671 612 _PORTCCFG = 0xe671 00E672 613 _PORTECFG = 0xe672 00E678 614 _I2CS = 0xe678 00E679 615 _I2DAT = 0xe679 00E67A 616 _I2CTL = 0xe67a 00E67B 617 _XAUTODAT1 = 0xe67b 00E67C 618 _XAUTODAT2 = 0xe67c 00E680 619 _USBCS = 0xe680 00E681 620 _SUSPEND = 0xe681 00E682 621 _WAKEUPCS = 0xe682 00E683 622 _TOGCTL = 0xe683 00E684 623 _USBFRAMEH = 0xe684 00E685 624 _USBFRAMEL = 0xe685 00E686 625 _MICROFRAME = 0xe686 00E687 626 _FNADDR = 0xe687 00E68A 627 _EP0BCH = 0xe68a 00E68B 628 _EP0BCL = 0xe68b 00E68D 629 _EP1OUTBC = 0xe68d 00E68F 630 _EP1INBC = 0xe68f 00E690 631 _EP2BCH = 0xe690 00E691 632 _EP2BCL = 0xe691 00E694 633 _EP4BCH = 0xe694 00E695 634 _EP4BCL = 0xe695 00E698 635 _EP6BCH = 0xe698 00E699 636 _EP6BCL = 0xe699 00E69C 637 _EP8BCH = 0xe69c 00E69D 638 _EP8BCL = 0xe69d 00E6A0 639 _EP0CS = 0xe6a0 00E6A1 640 _EP1OUTCS = 0xe6a1 00E6A2 641 _EP1INCS = 0xe6a2 00E6A3 642 _EP2CS = 0xe6a3 00E6A4 643 _EP4CS = 0xe6a4 00E6A5 644 _EP6CS = 0xe6a5 00E6A6 645 _EP8CS = 0xe6a6 00E6A7 646 _EP2FIFOFLGS = 0xe6a7 00E6A8 647 _EP4FIFOFLGS = 0xe6a8 00E6A9 648 _EP6FIFOFLGS = 0xe6a9 00E6AA 649 _EP8FIFOFLGS = 0xe6aa 00E6AB 650 _EP2FIFOBCH = 0xe6ab 00E6AC 651 _EP2FIFOBCL = 0xe6ac 00E6AD 652 _EP4FIFOBCH = 0xe6ad 00E6AE 653 _EP4FIFOBCL = 0xe6ae 00E6AF 654 _EP6FIFOBCH = 0xe6af 00E6B0 655 _EP6FIFOBCL = 0xe6b0 00E6B1 656 _EP8FIFOBCH = 0xe6b1 00E6B2 657 _EP8FIFOBCL = 0xe6b2 00E6B3 658 _SUDPTRH = 0xe6b3 00E6B4 659 _SUDPTRL = 0xe6b4 00E6B5 660 _SUDPTRCTL = 0xe6b5 00E6B8 661 _SETUPDAT = 0xe6b8 00E6C0 662 _GPIFWFSELECT = 0xe6c0 00E6C1 663 _GPIFIDLECS = 0xe6c1 00E6C2 664 _GPIFIDLECTL = 0xe6c2 00E6C3 665 _GPIFCTLCFG = 0xe6c3 00E6C4 666 _GPIFADRH = 0xe6c4 00E6C5 667 _GPIFADRL = 0xe6c5 00E6CE 668 _GPIFTCB3 = 0xe6ce 00E6CF 669 _GPIFTCB2 = 0xe6cf 00E6D0 670 _GPIFTCB1 = 0xe6d0 00E6D1 671 _GPIFTCB0 = 0xe6d1 00E6D2 672 _EP2GPIFFLGSEL = 0xe6d2 00E6D3 673 _EP2GPIFPFSTOP = 0xe6d3 00E6D4 674 _EP2GPIFTRIG = 0xe6d4 00E6DA 675 _EP4GPIFFLGSEL = 0xe6da 00E6DB 676 _EP4GPIFPFSTOP = 0xe6db 00E6DC 677 _EP4GPIFTRIG = 0xe6dc 00E6E2 678 _EP6GPIFFLGSEL = 0xe6e2 00E6E3 679 _EP6GPIFPFSTOP = 0xe6e3 00E6E4 680 _EP6GPIFTRIG = 0xe6e4 00E6EA 681 _EP8GPIFFLGSEL = 0xe6ea 00E6EB 682 _EP8GPIFPFSTOP = 0xe6eb 00E6EC 683 _EP8GPIFTRIG = 0xe6ec 00E6F0 684 _XGPIFSGLDATH = 0xe6f0 00E6F1 685 _XGPIFSGLDATLX = 0xe6f1 00E6F2 686 _XGPIFSGLDATLNOX = 0xe6f2 00E6F3 687 _GPIFREADYCFG = 0xe6f3 00E6F4 688 _GPIFREADYSTAT = 0xe6f4 00E6F5 689 _GPIFABORT = 0xe6f5 00E6C6 690 _FLOWSTATE = 0xe6c6 00E6C7 691 _FLOWLOGIC = 0xe6c7 00E6C8 692 _FLOWEQ0CTL = 0xe6c8 00E6C9 693 _FLOWEQ1CTL = 0xe6c9 00E6CA 694 _FLOWHOLDOFF = 0xe6ca 00E6CB 695 _FLOWSTB = 0xe6cb 00E6CC 696 _FLOWSTBEDGE = 0xe6cc 00E6CD 697 _FLOWSTBHPERIOD = 0xe6cd 00E60C 698 _GPIFHOLDAMOUNT = 0xe60c 00E67D 699 _UDMACRCH = 0xe67d 00E67E 700 _UDMACRCL = 0xe67e 00E67F 701 _UDMACRCQUAL = 0xe67f 00E6F8 702 _DBUG = 0xe6f8 00E6F9 703 _TESTCFG = 0xe6f9 00E6FA 704 _USBTEST = 0xe6fa 00E6FB 705 _CT1 = 0xe6fb 00E6FC 706 _CT2 = 0xe6fc 00E6FD 707 _CT3 = 0xe6fd 00E6FE 708 _CT4 = 0xe6fe 00E740 709 _EP0BUF = 0xe740 00E780 710 _EP1OUTBUF = 0xe780 00E7C0 711 _EP1INBUF = 0xe7c0 00F000 712 _EP2FIFOBUF = 0xf000 00F400 713 _EP4FIFOBUF = 0xf400 00F800 714 _EP6FIFOBUF = 0xf800 00FC00 715 _EP8FIFOBUF = 0xfc00 716 ;-------------------------------------------------------- 717 ; absolute external ram data 718 ;-------------------------------------------------------- 719 .area XABS (ABS,XDATA) 720 ;-------------------------------------------------------- 721 ; external initialized ram data 722 ;-------------------------------------------------------- 723 .area HOME (CODE) 724 .area GSINIT0 (CODE) 725 .area GSINIT1 (CODE) 726 .area GSINIT2 (CODE) 727 .area GSINIT3 (CODE) 728 .area GSINIT4 (CODE) 729 .area GSINIT5 (CODE) 730 .area GSINIT (CODE) 731 .area GSFINAL (CODE) 732 .area CSEG (CODE) 733 ;-------------------------------------------------------- 734 ; global & static initialisations 735 ;-------------------------------------------------------- 736 .area HOME (CODE) 737 .area GSINIT (CODE) 738 .area GSFINAL (CODE) 739 .area GSINIT (CODE) 740 ;-------------------------------------------------------- 741 ; Home 742 ;-------------------------------------------------------- 743 .area HOME (CODE) 744 .area HOME (CODE) 745 ;-------------------------------------------------------- 746 ; code 747 ;-------------------------------------------------------- 748 .area CSEG (CODE) 749 ;------------------------------------------------------------ 750 ;Allocation info for local variables in function 'setup_enables' 751 ;------------------------------------------------------------ 752 ;enables Allocated to registers r7 753 ;------------------------------------------------------------ 754 ; spi.c:27: setup_enables (unsigned char enables) 755 ; ----------------------------------------- 756 ; function setup_enables 757 ; ----------------------------------------- 000000 758 _setup_enables: 000007 759 ar7 = 0x07 000006 760 ar6 = 0x06 000005 761 ar5 = 0x05 000004 762 ar4 = 0x04 000003 763 ar3 = 0x03 000002 764 ar2 = 0x02 000001 765 ar1 = 0x01 000000 766 ar0 = 0x00 000000 AF 82 [24] 767 mov r7,dpl 768 ; spi.c:33: enables ^= SPI_ENABLE_FPGA; 000002 63 07 01 [24] 769 xrl ar7,#0x01 770 ; spi.c:37: USRP_PA = USRP_PA | (0x7 << 3); // disable FPGA, CODEC_A, CODEC_B 000005 43 80 38 [24] 771 orl _IOA,#0x38 772 ; spi.c:38: USRP_PA ^= (enables & 0x7) << 3; // enable specified devs 000008 8F 06 [24] 773 mov ar6,r7 00000A 53 06 07 [24] 774 anl ar6,#0x07 00000D EE [12] 775 mov a,r6 00000E C4 [12] 776 swap a 00000F 03 [12] 777 rr a 000010 54 F8 [12] 778 anl a,#0xf8 000012 62 80 [12] 779 xrl _IOA,a 780 ; spi.c:41: USRP_PE = USRP_PE | (0xf << 4); // disable TX_A, RX_A, TX_B, RX_B 000014 43 B1 F0 [24] 781 orl _IOE,#0xf0 782 ; spi.c:42: USRP_PE ^= (enables & 0xf0); // enable specified devs 000017 53 07 F0 [24] 783 anl ar7,#0xf0 00001A EF [12] 784 mov a,r7 00001B 62 B1 [12] 785 xrl _IOE,a 786 ; spi.c:43: } 00001D 22 [24] 787 ret 788 ;------------------------------------------------------------ 789 ;Allocation info for local variables in function 'init_spi' 790 ;------------------------------------------------------------ 791 ; spi.c:48: init_spi (void) 792 ; ----------------------------------------- 793 ; function init_spi 794 ; ----------------------------------------- 00001E 795 _init_spi: 796 ; spi.c:50: disable_all (); /* disable all devs */ 00001E 75 82 00 [24] 797 mov dpl,#0x00 000021 12r00r00 [24] 798 lcall _setup_enables 799 ; spi.c:51: bitS_OUT = 0; /* idle state has CLK = 0 */ 800 ; assignBit 000024 C2 81 [12] 801 clr _bitS_OUT 802 ; spi.c:52: } 000026 22 [24] 803 ret 804 ;------------------------------------------------------------ 805 ;Allocation info for local variables in function 'count_bits8' 806 ;------------------------------------------------------------ 807 ;v Allocated to registers r7 808 ;count Allocated to registers r6 809 ;------------------------------------------------------------ 810 ; spi.c:82: count_bits8 (unsigned char v) 811 ; ----------------------------------------- 812 ; function count_bits8 813 ; ----------------------------------------- 000027 814 _count_bits8: 000027 AF 82 [24] 815 mov r7,dpl 816 ; spi.c:84: unsigned char count = 0; 000029 7E 00 [12] 817 mov r6,#0x00 818 ; spi.c:85: if (v & (1 << 0)) count++; 00002B EF [12] 819 mov a,r7 00002C 30 E0 02 [24] 820 jnb acc.0,00102$ 00002F 7E 01 [12] 821 mov r6,#0x01 000031 822 00102$: 823 ; spi.c:86: if (v & (1 << 1)) count++; 000031 EF [12] 824 mov a,r7 000032 30 E1 01 [24] 825 jnb acc.1,00104$ 000035 0E [12] 826 inc r6 000036 827 00104$: 828 ; spi.c:87: if (v & (1 << 2)) count++; 000036 EF [12] 829 mov a,r7 000037 30 E2 01 [24] 830 jnb acc.2,00106$ 00003A 0E [12] 831 inc r6 00003B 832 00106$: 833 ; spi.c:88: if (v & (1 << 3)) count++; 00003B EF [12] 834 mov a,r7 00003C 30 E3 01 [24] 835 jnb acc.3,00108$ 00003F 0E [12] 836 inc r6 000040 837 00108$: 838 ; spi.c:89: if (v & (1 << 4)) count++; 000040 EF [12] 839 mov a,r7 000041 30 E4 01 [24] 840 jnb acc.4,00110$ 000044 0E [12] 841 inc r6 000045 842 00110$: 843 ; spi.c:90: if (v & (1 << 5)) count++; 000045 EF [12] 844 mov a,r7 000046 30 E5 01 [24] 845 jnb acc.5,00112$ 000049 0E [12] 846 inc r6 00004A 847 00112$: 848 ; spi.c:91: if (v & (1 << 6)) count++; 00004A EF [12] 849 mov a,r7 00004B 30 E6 01 [24] 850 jnb acc.6,00114$ 00004E 0E [12] 851 inc r6 00004F 852 00114$: 853 ; spi.c:92: if (v & (1 << 7)) count++; 00004F EF [12] 854 mov a,r7 000050 30 E7 01 [24] 855 jnb acc.7,00116$ 000053 0E [12] 856 inc r6 000054 857 00116$: 858 ; spi.c:93: return count; 000054 8E 82 [24] 859 mov dpl,r6 860 ; spi.c:94: } 000056 22 [24] 861 ret 862 ;------------------------------------------------------------ 863 ;Allocation info for local variables in function 'spi_read' 864 ;------------------------------------------------------------ 865 ;header_lo Allocated with name '_spi_read_PARM_2' 866 ;enables Allocated with name '_spi_read_PARM_3' 867 ;format Allocated with name '_spi_read_PARM_4' 868 ;buf Allocated with name '_spi_read_PARM_5' 869 ;len Allocated with name '_spi_read_PARM_6' 870 ;header_hi Allocated to registers r7 871 ;------------------------------------------------------------ 872 ; spi.c:109: spi_read (unsigned char header_hi, unsigned char header_lo, 873 ; ----------------------------------------- 874 ; function spi_read 875 ; ----------------------------------------- 000057 876 _spi_read: 000057 AF 82 [24] 877 mov r7,dpl 878 ; spi.c:113: if (count_bits8 (enables) > 1) 000059 85*01 82 [24] 879 mov dpl,_spi_read_PARM_3 00005C C0 07 [24] 880 push ar7 00005E 12r00r27 [24] 881 lcall _count_bits8 000061 AE 82 [24] 882 mov r6,dpl 000063 D0 07 [24] 883 pop ar7 000065 EE [12] 884 mov a,r6 000066 24 FE [12] 885 add a,#0xff - 0x01 000068 50 04 [24] 886 jnc 00102$ 887 ; spi.c:114: return 0; // error, too many enables set 00006A 75 82 00 [24] 888 mov dpl,#0x00 00006D 22 [24] 889 ret 00006E 890 00102$: 891 ; spi.c:116: setup_enables (enables); 00006E 85*01 82 [24] 892 mov dpl,_spi_read_PARM_3 000071 C0 07 [24] 893 push ar7 000073 12r00r00 [24] 894 lcall _setup_enables 000076 D0 07 [24] 895 pop ar7 896 ; spi.c:118: if (format & SPI_FMT_LSB){ // order: LSB 000078 E5*02 [12] 897 mov a,_spi_read_PARM_4 00007A 30 E7 04 [24] 898 jnb acc.7,00111$ 899 ; spi.c:120: return 0; // error, not implemented 00007D 75 82 00 [24] 900 mov dpl,#0x00 000080 22 [24] 901 ret 000081 902 00111$: 903 ; spi.c:142: switch (format & SPI_FMT_HDR_MASK){ 000081 74 60 [12] 904 mov a,#0x60 000083 55*02 [12] 905 anl a,_spi_read_PARM_4 000085 FE [12] 906 mov r6,a 000086 FD [12] 907 mov r5,a 000087 BD 00 02 [24] 908 cjne r5,#0x00,00141$ 00008A 80 23 [24] 909 sjmp 00107$ 00008C 910 00141$: 00008C BE 20 02 [24] 911 cjne r6,#0x20,00142$ 00008F 80 05 [24] 912 sjmp 00104$ 000091 913 00142$: 914 ; spi.c:145: case SPI_FMT_HDR_1: 000091 BE 40 17 [24] 915 cjne r6,#0x40,00106$ 000094 80 08 [24] 916 sjmp 00105$ 000096 917 00104$: 918 ; spi.c:146: write_byte_msb (header_lo); 000096 85*00 82 [24] 919 mov dpl,_spi_read_PARM_2 000099 12r01r26 [24] 920 lcall _write_byte_msb 921 ; spi.c:147: break; 922 ; spi.c:148: case SPI_FMT_HDR_2: 00009C 80 11 [24] 923 sjmp 00107$ 00009E 924 00105$: 925 ; spi.c:149: write_byte_msb (header_hi); 00009E 8F 82 [24] 926 mov dpl,r7 0000A0 12r01r26 [24] 927 lcall _write_byte_msb 928 ; spi.c:150: write_byte_msb (header_lo); 0000A3 85*00 82 [24] 929 mov dpl,_spi_read_PARM_2 0000A6 12r01r26 [24] 930 lcall _write_byte_msb 931 ; spi.c:151: break; 932 ; spi.c:152: default: 0000A9 80 04 [24] 933 sjmp 00107$ 0000AB 934 00106$: 935 ; spi.c:153: return 0; // error 0000AB 75 82 00 [24] 936 mov dpl,#0x00 937 ; spi.c:154: } 0000AE 22 [24] 938 ret 0000AF 939 00107$: 940 ; spi.c:155: if (len != 0) 0000AF E5*05 [12] 941 mov a,_spi_read_PARM_6 0000B1 60 0C [24] 942 jz 00112$ 943 ; spi.c:156: read_bytes_msb (buf, len); 0000B3 85*05*0D [24] 944 mov _read_bytes_msb_PARM_2,_spi_read_PARM_6 0000B6 85*03 82 [24] 945 mov dpl,_spi_read_PARM_5 0000B9 85*04 83 [24] 946 mov dph,(_spi_read_PARM_5 + 1) 0000BC 12r01rF6 [24] 947 lcall _read_bytes_msb 0000BF 948 00112$: 949 ; spi.c:159: disable_all (); 0000BF 75 82 00 [24] 950 mov dpl,#0x00 0000C2 12r00r00 [24] 951 lcall _setup_enables 952 ; spi.c:160: return 1; // success 0000C5 75 82 01 [24] 953 mov dpl,#0x01 954 ; spi.c:161: } 0000C8 22 [24] 955 ret 956 ;------------------------------------------------------------ 957 ;Allocation info for local variables in function 'spi_write' 958 ;------------------------------------------------------------ 959 ;header_lo Allocated with name '_spi_write_PARM_2' 960 ;enables Allocated with name '_spi_write_PARM_3' 961 ;format Allocated with name '_spi_write_PARM_4' 962 ;buf Allocated with name '_spi_write_PARM_5' 963 ;len Allocated with name '_spi_write_PARM_6' 964 ;header_hi Allocated to registers r7 965 ;------------------------------------------------------------ 966 ; spi.c:166: spi_write (unsigned char header_hi, unsigned char header_lo, 967 ; ----------------------------------------- 968 ; function spi_write 969 ; ----------------------------------------- 0000C9 970 _spi_write: 0000C9 AF 82 [24] 971 mov r7,dpl 972 ; spi.c:170: setup_enables (enables); 0000CB 85*07 82 [24] 973 mov dpl,_spi_write_PARM_3 0000CE C0 07 [24] 974 push ar7 0000D0 12r00r00 [24] 975 lcall _setup_enables 0000D3 D0 07 [24] 976 pop ar7 977 ; spi.c:172: if (format & SPI_FMT_LSB){ // order: LSB 0000D5 E5*08 [12] 978 mov a,_spi_write_PARM_4 0000D7 30 E7 04 [24] 979 jnb acc.7,00109$ 980 ; spi.c:174: return 0; // error, not implemented 0000DA 75 82 00 [24] 981 mov dpl,#0x00 0000DD 22 [24] 982 ret 0000DE 983 00109$: 984 ; spi.c:196: switch (format & SPI_FMT_HDR_MASK){ 0000DE 74 60 [12] 985 mov a,#0x60 0000E0 55*08 [12] 986 anl a,_spi_write_PARM_4 0000E2 FE [12] 987 mov r6,a 0000E3 FD [12] 988 mov r5,a 0000E4 BD 00 02 [24] 989 cjne r5,#0x00,00134$ 0000E7 80 23 [24] 990 sjmp 00105$ 0000E9 991 00134$: 0000E9 BE 20 02 [24] 992 cjne r6,#0x20,00135$ 0000EC 80 05 [24] 993 sjmp 00102$ 0000EE 994 00135$: 995 ; spi.c:199: case SPI_FMT_HDR_1: 0000EE BE 40 17 [24] 996 cjne r6,#0x40,00104$ 0000F1 80 08 [24] 997 sjmp 00103$ 0000F3 998 00102$: 999 ; spi.c:200: write_byte_msb (header_lo); 0000F3 85*06 82 [24] 1000 mov dpl,_spi_write_PARM_2 0000F6 12r01r26 [24] 1001 lcall _write_byte_msb 1002 ; spi.c:201: break; 1003 ; spi.c:202: case SPI_FMT_HDR_2: 0000F9 80 11 [24] 1004 sjmp 00105$ 0000FB 1005 00103$: 1006 ; spi.c:203: write_byte_msb (header_hi); 0000FB 8F 82 [24] 1007 mov dpl,r7 0000FD 12r01r26 [24] 1008 lcall _write_byte_msb 1009 ; spi.c:204: write_byte_msb (header_lo); 000100 85*06 82 [24] 1010 mov dpl,_spi_write_PARM_2 000103 12r01r26 [24] 1011 lcall _write_byte_msb 1012 ; spi.c:205: break; 1013 ; spi.c:206: default: 000106 80 04 [24] 1014 sjmp 00105$ 000108 1015 00104$: 1016 ; spi.c:207: return 0; // error 000108 75 82 00 [24] 1017 mov dpl,#0x00 1018 ; spi.c:208: } 00010B 22 [24] 1019 ret 00010C 1020 00105$: 1021 ; spi.c:209: if (len != 0) 00010C E5*0B [12] 1022 mov a,_spi_write_PARM_6 00010E 60 0C [24] 1023 jz 00110$ 1024 ; spi.c:210: write_bytes_msb (buf, len); 000110 85*0B*0C [24] 1025 mov _write_bytes_msb_PARM_2,_spi_write_PARM_6 000113 85*09 82 [24] 1026 mov dpl,_spi_write_PARM_5 000116 85*0A 83 [24] 1027 mov dph,(_spi_write_PARM_5 + 1) 000119 12r01r8F [24] 1028 lcall _write_bytes_msb 00011C 1029 00110$: 1030 ; spi.c:213: disable_all (); 00011C 75 82 00 [24] 1031 mov dpl,#0x00 00011F 12r00r00 [24] 1032 lcall _setup_enables 1033 ; spi.c:214: return 1; // success 000122 75 82 01 [24] 1034 mov dpl,#0x01 1035 ; spi.c:215: } 000125 22 [24] 1036 ret 1037 ;------------------------------------------------------------ 1038 ;Allocation info for local variables in function 'write_byte_msb' 1039 ;------------------------------------------------------------ 1040 ;v Allocated to registers r7 1041 ;------------------------------------------------------------ 1042 ; spi.c:220: write_byte_msb (unsigned char v) 1043 ; ----------------------------------------- 1044 ; function write_byte_msb 1045 ; ----------------------------------------- 000126 1046 _write_byte_msb: 1047 ; spi.c:222: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 000126 E5 82 [12] 1048 mov a,dpl 000128 23 [12] 1049 rl a 1050 ; spi.c:223: bitS_OUT = v & 0x1; 000129 FF [12] 1051 mov r7,a 00012A 54 01 [12] 1052 anl a,#0x01 1053 ; assignBit 00012C 24 FF [12] 1054 add a,#0xff 00012E 92 81 [24] 1055 mov _bitS_OUT,c 1056 ; spi.c:224: bitS_CLK = 1; 1057 ; assignBit 000130 D2 80 [12] 1058 setb _bitS_CLK 1059 ; spi.c:225: bitS_CLK = 0; 1060 ; assignBit 000132 C2 80 [12] 1061 clr _bitS_CLK 1062 ; spi.c:227: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 000134 EF [12] 1063 mov a,r7 000135 23 [12] 1064 rl a 1065 ; spi.c:228: bitS_OUT = v & 0x1; 000136 FF [12] 1066 mov r7,a 000137 54 01 [12] 1067 anl a,#0x01 1068 ; assignBit 000139 24 FF [12] 1069 add a,#0xff 00013B 92 81 [24] 1070 mov _bitS_OUT,c 1071 ; spi.c:229: bitS_CLK = 1; 1072 ; assignBit 00013D D2 80 [12] 1073 setb _bitS_CLK 1074 ; spi.c:230: bitS_CLK = 0; 1075 ; assignBit 00013F C2 80 [12] 1076 clr _bitS_CLK 1077 ; spi.c:232: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 000141 EF [12] 1078 mov a,r7 000142 23 [12] 1079 rl a 1080 ; spi.c:233: bitS_OUT = v & 0x1; 000143 FF [12] 1081 mov r7,a 000144 54 01 [12] 1082 anl a,#0x01 1083 ; assignBit 000146 24 FF [12] 1084 add a,#0xff 000148 92 81 [24] 1085 mov _bitS_OUT,c 1086 ; spi.c:234: bitS_CLK = 1; 1087 ; assignBit 00014A D2 80 [12] 1088 setb _bitS_CLK 1089 ; spi.c:235: bitS_CLK = 0; 1090 ; assignBit 00014C C2 80 [12] 1091 clr _bitS_CLK 1092 ; spi.c:237: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 00014E EF [12] 1093 mov a,r7 00014F 23 [12] 1094 rl a 1095 ; spi.c:238: bitS_OUT = v & 0x1; 000150 FF [12] 1096 mov r7,a 000151 54 01 [12] 1097 anl a,#0x01 1098 ; assignBit 000153 24 FF [12] 1099 add a,#0xff 000155 92 81 [24] 1100 mov _bitS_OUT,c 1101 ; spi.c:239: bitS_CLK = 1; 1102 ; assignBit 000157 D2 80 [12] 1103 setb _bitS_CLK 1104 ; spi.c:240: bitS_CLK = 0; 1105 ; assignBit 000159 C2 80 [12] 1106 clr _bitS_CLK 1107 ; spi.c:242: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 00015B EF [12] 1108 mov a,r7 00015C 23 [12] 1109 rl a 1110 ; spi.c:243: bitS_OUT = v & 0x1; 00015D FF [12] 1111 mov r7,a 00015E 54 01 [12] 1112 anl a,#0x01 1113 ; assignBit 000160 24 FF [12] 1114 add a,#0xff 000162 92 81 [24] 1115 mov _bitS_OUT,c 1116 ; spi.c:244: bitS_CLK = 1; 1117 ; assignBit 000164 D2 80 [12] 1118 setb _bitS_CLK 1119 ; spi.c:245: bitS_CLK = 0; 1120 ; assignBit 000166 C2 80 [12] 1121 clr _bitS_CLK 1122 ; spi.c:247: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 000168 EF [12] 1123 mov a,r7 000169 23 [12] 1124 rl a 1125 ; spi.c:248: bitS_OUT = v & 0x1; 00016A FF [12] 1126 mov r7,a 00016B 54 01 [12] 1127 anl a,#0x01 1128 ; assignBit 00016D 24 FF [12] 1129 add a,#0xff 00016F 92 81 [24] 1130 mov _bitS_OUT,c 1131 ; spi.c:249: bitS_CLK = 1; 1132 ; assignBit 000171 D2 80 [12] 1133 setb _bitS_CLK 1134 ; spi.c:250: bitS_CLK = 0; 1135 ; assignBit 000173 C2 80 [12] 1136 clr _bitS_CLK 1137 ; spi.c:252: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 000175 EF [12] 1138 mov a,r7 000176 23 [12] 1139 rl a 1140 ; spi.c:253: bitS_OUT = v & 0x1; 000177 FF [12] 1141 mov r7,a 000178 54 01 [12] 1142 anl a,#0x01 1143 ; assignBit 00017A 24 FF [12] 1144 add a,#0xff 00017C 92 81 [24] 1145 mov _bitS_OUT,c 1146 ; spi.c:254: bitS_CLK = 1; 1147 ; assignBit 00017E D2 80 [12] 1148 setb _bitS_CLK 1149 ; spi.c:255: bitS_CLK = 0; 1150 ; assignBit 000180 C2 80 [12] 1151 clr _bitS_CLK 1152 ; spi.c:257: v = (v << 1) | (v >> 7); // rotate left (MSB into bottom bit) 000182 EF [12] 1153 mov a,r7 000183 23 [12] 1154 rl a 1155 ; spi.c:258: bitS_OUT = v & 0x1; 000184 54 01 [12] 1156 anl a,#0x01 1157 ; assignBit 000186 24 FF [12] 1158 add a,#0xff 000188 92 81 [24] 1159 mov _bitS_OUT,c 1160 ; spi.c:259: bitS_CLK = 1; 1161 ; assignBit 00018A D2 80 [12] 1162 setb _bitS_CLK 1163 ; spi.c:260: bitS_CLK = 0; 1164 ; assignBit 00018C C2 80 [12] 1165 clr _bitS_CLK 1166 ; spi.c:261: } 00018E 22 [24] 1167 ret 1168 ;------------------------------------------------------------ 1169 ;Allocation info for local variables in function 'write_bytes_msb' 1170 ;------------------------------------------------------------ 1171 ;len Allocated with name '_write_bytes_msb_PARM_2' 1172 ;buf Allocated to registers 1173 ;------------------------------------------------------------ 1174 ; spi.c:264: write_bytes_msb (const __xdata unsigned char *buf, unsigned char len) 1175 ; ----------------------------------------- 1176 ; function write_bytes_msb 1177 ; ----------------------------------------- 00018F 1178 _write_bytes_msb: 00018F AE 82 [24] 1179 mov r6,dpl 000191 AF 83 [24] 1180 mov r7,dph 1181 ; spi.c:266: while (len-- != 0){ 000193 AD*0C [24] 1182 mov r5,_write_bytes_msb_PARM_2 000195 1183 00101$: 000195 8D 04 [24] 1184 mov ar4,r5 000197 1D [12] 1185 dec r5 000198 EC [12] 1186 mov a,r4 000199 60 1E [24] 1187 jz 00104$ 1188 ; spi.c:267: write_byte_msb (*buf++); 00019B 8E 82 [24] 1189 mov dpl,r6 00019D 8F 83 [24] 1190 mov dph,r7 00019F E0 [24] 1191 movx a,@dptr 0001A0 FC [12] 1192 mov r4,a 0001A1 A3 [24] 1193 inc dptr 0001A2 AE 82 [24] 1194 mov r6,dpl 0001A4 AF 83 [24] 1195 mov r7,dph 0001A6 8C 82 [24] 1196 mov dpl,r4 0001A8 C0 07 [24] 1197 push ar7 0001AA C0 06 [24] 1198 push ar6 0001AC C0 05 [24] 1199 push ar5 0001AE 12r01r26 [24] 1200 lcall _write_byte_msb 0001B1 D0 05 [24] 1201 pop ar5 0001B3 D0 06 [24] 1202 pop ar6 0001B5 D0 07 [24] 1203 pop ar7 0001B7 80 DC [24] 1204 sjmp 00101$ 0001B9 1205 00104$: 1206 ; spi.c:269: } 0001B9 22 [24] 1207 ret 1208 ;------------------------------------------------------------ 1209 ;Allocation info for local variables in function 'read_byte_msb' 1210 ;------------------------------------------------------------ 1211 ; spi.c:323: read_byte_msb (void) __naked 1212 ; ----------------------------------------- 1213 ; function read_byte_msb 1214 ; ----------------------------------------- 0001BA 1215 _read_byte_msb: 1216 ; naked function: no prologue. 1217 ; spi.c:370: __endasm; 0001BA E4 [12] 1218 clr a 0001BB D2 80 [12] 1219 setb _bitS_CLK 0001BD A2 82 [12] 1220 mov c, _bitS_IN 0001BF 33 [12] 1221 rlc a 0001C0 C2 80 [12] 1222 clr _bitS_CLK 0001C2 D2 80 [12] 1223 setb _bitS_CLK 0001C4 A2 82 [12] 1224 mov c, _bitS_IN 0001C6 33 [12] 1225 rlc a 0001C7 C2 80 [12] 1226 clr _bitS_CLK 0001C9 D2 80 [12] 1227 setb _bitS_CLK 0001CB A2 82 [12] 1228 mov c, _bitS_IN 0001CD 33 [12] 1229 rlc a 0001CE C2 80 [12] 1230 clr _bitS_CLK 0001D0 D2 80 [12] 1231 setb _bitS_CLK 0001D2 A2 82 [12] 1232 mov c, _bitS_IN 0001D4 33 [12] 1233 rlc a 0001D5 C2 80 [12] 1234 clr _bitS_CLK 0001D7 D2 80 [12] 1235 setb _bitS_CLK 0001D9 A2 82 [12] 1236 mov c, _bitS_IN 0001DB 33 [12] 1237 rlc a 0001DC C2 80 [12] 1238 clr _bitS_CLK 0001DE D2 80 [12] 1239 setb _bitS_CLK 0001E0 A2 82 [12] 1240 mov c, _bitS_IN 0001E2 33 [12] 1241 rlc a 0001E3 C2 80 [12] 1242 clr _bitS_CLK 0001E5 D2 80 [12] 1243 setb _bitS_CLK 0001E7 A2 82 [12] 1244 mov c, _bitS_IN 0001E9 33 [12] 1245 rlc a 0001EA C2 80 [12] 1246 clr _bitS_CLK 0001EC D2 80 [12] 1247 setb _bitS_CLK 0001EE A2 82 [12] 1248 mov c, _bitS_IN 0001F0 33 [12] 1249 rlc a 0001F1 C2 80 [12] 1250 clr _bitS_CLK 0001F3 F5 82 [12] 1251 mov dpl,a 0001F5 22 [24] 1252 ret 1253 ; spi.c:371: } 1254 ; naked function: no epilogue. 1255 ;------------------------------------------------------------ 1256 ;Allocation info for local variables in function 'read_bytes_msb' 1257 ;------------------------------------------------------------ 1258 ;len Allocated with name '_read_bytes_msb_PARM_2' 1259 ;buf Allocated to registers 1260 ;------------------------------------------------------------ 1261 ; spi.c:375: read_bytes_msb (__xdata unsigned char *buf, unsigned char len) 1262 ; ----------------------------------------- 1263 ; function read_bytes_msb 1264 ; ----------------------------------------- 0001F6 1265 _read_bytes_msb: 0001F6 AE 82 [24] 1266 mov r6,dpl 0001F8 AF 83 [24] 1267 mov r7,dph 1268 ; spi.c:377: while (len-- != 0){ 0001FA AD*0D [24] 1269 mov r5,_read_bytes_msb_PARM_2 0001FC 1270 00101$: 0001FC 8D 04 [24] 1271 mov ar4,r5 0001FE 1D [12] 1272 dec r5 0001FF EC [12] 1273 mov a,r4 000200 60 12 [24] 1274 jz 00104$ 1275 ; spi.c:378: *buf++ = read_byte_msb (); 000202 12r01rBA [24] 1276 lcall _read_byte_msb 000205 AC 82 [24] 1277 mov r4,dpl 000207 8E 82 [24] 1278 mov dpl,r6 000209 8F 83 [24] 1279 mov dph,r7 00020B EC [12] 1280 mov a,r4 00020C F0 [24] 1281 movx @dptr,a 00020D A3 [24] 1282 inc dptr 00020E AE 82 [24] 1283 mov r6,dpl 000210 AF 83 [24] 1284 mov r7,dph 000212 80 E8 [24] 1285 sjmp 00101$ 000214 1286 00104$: 1287 ; spi.c:380: } 000214 22 [24] 1288 ret 1289 .area CSEG (CODE) 1290 .area CONST (CODE) 1291 .area CABS (ABS,CODE)