Skip to content
Jenkins
All
ttcn3-pcu-test
#2739
Tests
(root)
PCU_Tests
Search
Sign in
Status
Changes
Console Output
View Build Information
Parameters
Timings
Git Build Data
See Fingerprints
Tests
Previous Build
Next Build
prepare for jenkins shutdown to apply updates
PCU_Tests
110
5
105
Took 6 min 22 sec
All Tests
Name
Age
Duration
TC_bssgp_dl_unitdata_with_invalid_imsi
0
2.1 sec
TC_bssgp_dl_unitdata_with_valid_imsi
0
2.4 sec
TC_countdown_procedure
0
2.6 sec
TC_cs_initial_dl
0
2.1 sec
TC_cs_initial_ul
0
2.6 sec
TC_cs_lqual_ul_tbf
0
5.2 sec
TC_cs_max_dl
0
13 sec
TC_cs_max_ul
0
2.4 sec
TC_dl_cs1_to_cs4
0
10 sec
TC_dl_egprs_data_no_llc_ui_dummy
0
2.1 sec
TC_dl_flow_more_blocks
0
2.1 sec
TC_dl_gprs_data_no_llc_ui_dummy
0
2 sec
TC_dl_llc_sapi_priority
0
2.1 sec
TC_dl_multislot_tbf_ms_class_from_2phase
0
2.2 sec
TC_dl_multislot_tbf_ms_class_from_sgsn
2051
2.1 sec
TC_dl_multislot_tbf_ms_class_unknown
1076
2.1 sec
TC_dl_no_ack_retrans_imm_ass
0
3 sec
TC_egprs_pkt_chan_req_one_phase
0
1.9 sec
TC_egprs_pkt_chan_req_reject_content
0
1.8 sec
TC_egprs_pkt_chan_req_reject_emergency
0
1.8 sec
TC_egprs_pkt_chan_req_reject_exhaustion
0
1.9 sec
TC_egprs_pkt_chan_req_signalling
0
1.8 sec
TC_egprs_pkt_chan_req_two_phase
0
1.8 sec
TC_force_two_phase_access
0
2.8 sec
TC_imm_ass_dl_block_retrans
0
2.5 sec
TC_mcs_initial_dl
0
2.1 sec
TC_mcs_initial_ul
0
2.6 sec
TC_mcs_max_dl
0
12 sec
TC_mcs_max_ul
0
2.4 sec
TC_mo_ping_pong
0
2.4 sec
TC_mo_ping_pong_with_ul_racap
0
2.8 sec
TC_mo_ping_pong_with_ul_racap_egprs_only
0
2.8 sec
TC_mt_ping_pong
0
2.2 sec
TC_mt_ping_pong_with_dl_racap
0
2.2 sec
TC_multiplex_dl_gprs_egprs
0
11 sec
TC_multitrx_multims_alloc
0
1.8 sec
TC_n3101_max_t3169
0
3.2 sec
TC_n3103_max_t3169
0
3.2 sec
TC_n3105_max_t3195
0
4.4 sec
TC_nacc_outbound_pkt_cell_chg_notif_dup
0
4.5 sec
TC_nacc_outbound_pkt_cell_chg_notif_dup2
0
3.5 sec
TC_nacc_outbound_pkt_cell_chg_notif_dup3
0
2.3 sec
TC_nacc_outbound_pkt_cell_chg_notif_dup4
0
2.3 sec
TC_nacc_outbound_pkt_cell_chg_notif_dup5
0
2.3 sec
TC_nacc_outbound_pkt_cell_chg_notif_twice
0
2.6 sec
TC_nacc_outbound_pkt_cell_chg_notif_twice2
0
2.5 sec
TC_nacc_outbound_pkt_cell_chg_notif_twice3
0
2.3 sec
TC_nacc_outbound_pkt_cell_chg_notif_twice4
0
2.4 sec
TC_nacc_outbound_pkt_cell_chg_notif_twice5
0
2.5 sec
TC_nacc_outbound_pkt_cell_chg_notif_unassigned_dl_tbf
0
2.6 sec
TC_nacc_outbound_rac_ci_resolve_timeout
0
3.2 sec
TC_nacc_outbound_si_resolve_timeout
0
3.2 sec
TC_nacc_outbound_success
0
2.3 sec
TC_nacc_outbound_success_eutran
0
2.2 sec
TC_nacc_outbound_success_no_ctrl_ack
0
2.4 sec
TC_nacc_outbound_success_twice
0
2.5 sec
TC_nacc_outbound_success_twice_nocache
0
4.5 sec
TC_nacc_outbound_success_utran
0
2.2 sec
TC_paging_cs_from_bts
0
2 sec
TC_paging_cs_from_sgsn_ptp
0
2 sec
TC_paging_cs_from_sgsn_sign
0
2.1 sec
TC_paging_cs_from_sgsn_sign_ptmsi
0
2.1 sec
TC_paging_cs_multi_ms_imsi
0
10 sec
TC_paging_cs_multi_ms_imsi_tmsi
0
10 sec
TC_paging_cs_multi_ms_tmsi
0
8.2 sec
TC_paging_pch_timeout
0
6.1 sec
TC_paging_ps_from_sgsn_ptp
0
4.9 sec
TC_paging_ps_from_sgsn_sign
0
4.9 sec
TC_paging_ps_from_sgsn_sign_ptmsi
0
5 sec
TC_pcuif_fh_imm_ass_dl
0
1.9 sec
TC_pcuif_fh_imm_ass_ul
0
1.8 sec
TC_pcuif_fh_imm_ass_ul_egprs
0
1.8 sec
TC_pcuif_fh_pkt_ass_dl
0
2.2 sec
TC_pcuif_fh_pkt_ass_ul
0
2 sec
TC_pcuif_info_ind_subsequent
0
2 sec
TC_pcuif_suspend
0
3.7 sec
TC_pcuif_suspend_active_tbf
0
2.4 sec
TC_pdch_energy_saving
0
1.8 sec
TC_ratectr_all_available_allocated
0
3.9 sec
TC_rim_ran_info_req_single_rep
0
2.8 sec
TC_rim_ran_info_req_single_rep_eutran
0
2.9 sec
TC_rim_ran_info_req_single_rep_no_si
0
2.8 sec
TC_stat_pdch_avail_occ
0
2.1 sec
TC_stat_pdch_avail_occ_ms_not_known_egprs
0
2.1 sec
TC_stat_pdch_avail_occ_ms_not_known_gprs
0
2.1 sec
TC_t3141
0
1.8 sec
TC_t3172_wait_ind_size0
0
2.1 sec
TC_t3172_wait_ind_size1
0
2 sec
TC_t3193
0
2.2 sec
TC_ta_idle_dl_tbf_ass
2051
1.8 sec
TC_ta_ptcch_idle
0
2.2 sec
TC_ta_ptcch_ul_multi_tbf
2051
5.8 sec
TC_ta_rach_imm_ass
0
1.8 sec
TC_ta_ul_ack_nack_first_block
1873
2 sec
TC_ul_all_sizes
0
3.8 sec
TC_ul_data_toolong_fills_padding
0
3.6 sec
TC_ul_flow_multiple_llc_blocks
0
2.2 sec
TC_ul_intermediate_retrans
0
2.4 sec
TC_ul_multislot_tbf_ms_class_from_2phase
0
2 sec
TC_ul_tbf_1phase_while_dl_ass_pch
0
2.5 sec
TC_ul_tbf_2phase_while_dl_ass_pch
0
2.5 sec
TC_ul_tbf_bsn_wraparound_gprs
0
8.2 sec
TC_ul_tbf_finished_pkt_dl_ass_pch
0
2.4 sec
TC_ul_tbf_reestablish_with_pkt_dl_ack_nack
0
2.1 sec
TC_ul_tbf_reestablish_with_pkt_dl_ack_nack_egprs
0
2.1 sec
TC_ul_tbf_reestablish_with_pkt_resource_req
0
2.4 sec
TC_ul_tbf_reestablish_with_pkt_resource_req_t3168
0
18 sec
TC_x2001_pacch_pkt_dl_ass_unanswered_timeout
0
5.8 sec
TC_x2031_t3191
0
7.6 sec
TC_zero_x2031_t3191
0
4.4 sec