trial-ttcn3_bts_tests:sysmo 101

Took 59 min

All Failed Tests

Name	Age	Duration
TC_chan_act_a51 Regression	3	45 sec
TC_chan_act_a52	1	44 sec
TC_chan_act_a53	3	44 sec
TC_chan_act_stress	1	24 sec
TC_conn_fail_crit Regression	2	44 sec
TC_deact_sacch	3	34 sec
TC_encr_cmd_a51	1	44 sec
TC_encr_cmd_a52	1	44 sec
TC_encr_cmd_a53	3	44 sec
TC_ho_rach	3	37 sec
TC_meas_res_sign_sdcch4	3	44 sec
TC_meas_res_sign_sdcch8	3	44 sec
TC_meas_res_sign_tchf	3	44 sec
TC_meas_res_sign_tchh	3	44 sec
TC_meas_res_sign_tchh_toa256	3	44 sec
TC_meas_res_speech_tchf	3	32 sec
TC_meas_res_speech_tchf_facch	3	44 sec
TC_meas_res_speech_tchh	3	44 sec
TC_meas_res_speech_tchh_facch	3	44 sec
TC_meas_res_speech_tchh_toa256	3	44 sec
TC_ms_pwr_ctrl_constant	3	45 sec
TC_ms_pwr_ctrl_pf_ewma	3	44 sec
TC_paging_imsi_200percent	1	44 sec
TC_paging_imsi_80percent	1	47 sec
TC_paging_tmsi_200percent	1	44 sec
TC_paging_tmsi_80percent	1	44 sec
TC_rach_load_count	3	2 sec
TC_rach_load_idle_below_thresh	3	2 sec
TC_rach_load_idle_thresh0	3	2 sec
TC_rach_max_ta	3	26 sec
TC_rll_est_ind	1	36 sec
TC_rll_est_req_ACCH_3	3	44 sec
TC_rll_est_req_DCCH_3	1	45 sec
TC_rll_rel_ind_ACCH_0	3	44 sec
TC_rll_rel_ind_ACCH_3	3	44 sec
TC_rll_rel_ind_DCCH_0	1	44 sec
TC_rll_rel_ind_DCCH_3	1	44 sec
TC_rll_rel_req	3	44 sec
TC_rll_unit_data_ind_ACCH	1	44 sec
TC_rll_unit_data_ind_DCCH	1	44 sec
TC_rll_unit_data_req_ACCH	3	44 sec
TC_rll_unit_data_req_DCCH	1	44 sec
TC_rsl_bs_pwr_static_ass	1	38 sec
TC_rsl_bs_pwr_static_power_control	1	44 sec
TC_rsl_chan_initial_ms_pwr	3	36 sec
TC_rsl_chan_initial_ta	3	44 sec
TC_rsl_modify_encr	3	44 sec
TC_rsl_ms_pwr_ctrl	1	45 sec
TC_rsl_ms_pwr_dyn_active	3	25 sec
TC_rsl_ms_pwr_dyn_active2	3	17 sec
TC_rsl_ms_pwr_dyn_ass_updown	3	16 sec
TC_rsl_ms_pwr_dyn_down	3	16 sec
TC_rsl_ms_pwr_dyn_max	3	16 sec
TC_rsl_ms_pwr_dyn_up	3	16 sec
TC_sacch_chan_act	3	24 sec
TC_sacch_chan_act_ho_async	3	26 sec
TC_sacch_chan_act_ho_sync	3	30 sec
TC_sacch_filling	3	36 sec
TC_sacch_info_mod	3	35 sec
TC_sacch_multi	3	28 sec
TC_sacch_multi_chg	3	25 sec
TC_si_sched_1 Regression	1	49 sec
TC_si_sched_13	1	44 sec
TC_si_sched_13_2bis_2ter_2quater	1	44 sec
TC_si_sched_2bis	1	44 sec
TC_si_sched_2quater Regression	1	44 sec
TC_si_sched_2ter Regression	1	44 sec
TC_si_sched_2ter_2bis	1	44 sec
TC_si_sched_default Regression	1	35 sec
TC_speech_no_rtp_tchf	1	44 sec
TC_speech_no_rtp_tchh Regression	1	44 sec
TC_tch_sign_l2_fill_frame	3	33 sec
TC_tch_sign_l2_fill_frame_dtxd	3	44 sec
TC_tx_power_ramp_adm_state_change	3	20 sec
TC_tx_power_start_ramp_down_bcch	3	27 sec
TC_tx_power_start_ramp_up_bcch	3	44 sec

All Tests

Class	Failed	Skipped	Passed	Total	Duration
ttcn3_bts_tests	76+7	0	25-7	101	59 min