;--------------------------------------------------------
; File Created by SDCC : free open source ANSI-C Compiler
; Version 4.2.0 #13081 (Linux)
;--------------------------------------------------------
	.module delay
	.optsdcc -mmcs51 --model-small
	
;--------------------------------------------------------
; Public variables in this module
;--------------------------------------------------------
	.globl _mdelay
	.globl _udelay
;--------------------------------------------------------
; special function registers
;--------------------------------------------------------
	.area RSEG    (ABS,DATA)
	.org 0x0000
;--------------------------------------------------------
; special function bits
;--------------------------------------------------------
	.area RSEG    (ABS,DATA)
	.org 0x0000
;--------------------------------------------------------
; overlayable register banks
;--------------------------------------------------------
	.area REG_BANK_0	(REL,OVR,DATA)
	.ds 8
;--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
;--------------------------------------------------------
; overlayable items in internal ram
;--------------------------------------------------------
;--------------------------------------------------------
; indirectly addressable internal ram data
;--------------------------------------------------------
	.area ISEG    (DATA)
;--------------------------------------------------------
; absolute internal ram data
;--------------------------------------------------------
	.area IABS    (ABS,DATA)
	.area IABS    (ABS,DATA)
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
	.area BSEG    (BIT)
;--------------------------------------------------------
; paged external ram data
;--------------------------------------------------------
	.area PSEG    (PAG,XDATA)
;--------------------------------------------------------
; external ram data
;--------------------------------------------------------
	.area XSEG    (XDATA)
;--------------------------------------------------------
; absolute external ram data
;--------------------------------------------------------
	.area XABS    (ABS,XDATA)
;--------------------------------------------------------
; external initialized ram data
;--------------------------------------------------------
	.area HOME    (CODE)
	.area GSINIT0 (CODE)
	.area GSINIT1 (CODE)
	.area GSINIT2 (CODE)
	.area GSINIT3 (CODE)
	.area GSINIT4 (CODE)
	.area GSINIT5 (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area CSEG    (CODE)
;--------------------------------------------------------
; global & static initialisations
;--------------------------------------------------------
	.area HOME    (CODE)
	.area GSINIT  (CODE)
	.area GSFINAL (CODE)
	.area GSINIT  (CODE)
;--------------------------------------------------------
; Home
;--------------------------------------------------------
	.area HOME    (CODE)
	.area HOME    (CODE)
;--------------------------------------------------------
; code
;--------------------------------------------------------
	.area CSEG    (CODE)
;------------------------------------------------------------
;Allocation info for local variables in function 'udelay1'
;------------------------------------------------------------
;	delay.c:27: udelay1 (void) __naked
;	-----------------------------------------
;	 function udelay1
;	-----------------------------------------
_udelay1:
;	naked function: no prologue.
;	delay.c:31: __endasm;
;	lcall that got us here took 4 bus cycles
	ret	; 4 bus cycles
;	delay.c:32: }
;	naked function: no epilogue.
;------------------------------------------------------------
;Allocation info for local variables in function 'udelay'
;------------------------------------------------------------
;usecs                     Allocated to registers 
;------------------------------------------------------------
;	delay.c:38: udelay (unsigned char usecs)
;	-----------------------------------------
;	 function udelay
;	-----------------------------------------
_udelay:
	ar7 = 0x07
	ar6 = 0x06
	ar5 = 0x05
	ar4 = 0x04
	ar3 = 0x03
	ar2 = 0x02
	ar1 = 0x01
	ar0 = 0x00
	mov	r7,dpl
;	delay.c:40: do {
00101$:
;	delay.c:41: udelay1 ();
	lcall	_udelay1
;	delay.c:42: } while (--usecs != 0);
	djnz	r7,00101$
;	delay.c:43: }
	ret
;------------------------------------------------------------
;Allocation info for local variables in function 'mdelay1'
;------------------------------------------------------------
;	delay.c:54: mdelay1 (void) __naked
;	-----------------------------------------
;	 function mdelay1
;	-----------------------------------------
_mdelay1:
;	naked function: no prologue.
;	delay.c:65: __endasm;
	mov	dptr,#(-1200 & 0xffff)
	002$:
	inc	dptr ; 3 bus cycles
	mov	a, dpl ; 2 bus cycles
	orl	a, dph ; 2 bus cycles
	jnz	002$ ; 3 bus cycles
	ret
;	delay.c:66: }
;	naked function: no epilogue.
;------------------------------------------------------------
;Allocation info for local variables in function 'mdelay'
;------------------------------------------------------------
;msecs                     Allocated to registers 
;------------------------------------------------------------
;	delay.c:69: mdelay (unsigned int msecs)
;	-----------------------------------------
;	 function mdelay
;	-----------------------------------------
_mdelay:
	mov	r6,dpl
	mov	r7,dph
;	delay.c:71: do {
00101$:
;	delay.c:72: mdelay1 ();
	lcall	_mdelay1
;	delay.c:73: } while (--msecs != 0);
	dec	r6
	cjne	r6,#0xff,00111$
	dec	r7
00111$:
	mov	a,r6
	orl	a,r7
	jnz	00101$
;	delay.c:74: }
	ret
	.area CSEG    (CODE)
	.area CONST   (CODE)
	.area CABS    (ABS,CODE)
